diff --git a/.clang-format b/.clang-format
new file mode 100644
index 0000000..361ce94
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,13 @@
+BasedOnStyle: Google
+AccessModifierOffset: -2
+AllowShortFunctionsOnASingleLine: Inline
+ColumnLimit: 100
+CommentPragmas: NOLINT:.*
+DerivePointerAlignment: false
+IndentWidth: 4
+ContinuationIndentWidth: 8
+PointerAlignment: Right
+TabWidth: 4
+UseTab: Never
+AllowShortIfStatementsOnASingleLine: false
+SpacesBeforeTrailingComments: 2
diff --git a/Android.bp b/Android.bp
new file mode 100644
index 0000000..8821482
--- /dev/null
+++ b/Android.bp
@@ -0,0 +1,38 @@
+//
+// Copyright (C) 2021 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+soong_namespace {
+    imports: [
+        "hardware/google/interfaces",
+        "hardware/google/pixel",
+    ],
+}
+
+package {
+    default_applicable_licenses: ["device_google_felix_license"],
+}
+
+// Added automatically by a large-scale-change
+// See: http://go/android-license-faq
+license {
+    name: "device_google_felix_license",
+    visibility: [":__subpackages__"],
+    license_kinds: [
+        "SPDX-license-identifier-Apache-2.0",
+        "SPDX-license-identifier-BSD",
+    ],
+    license_text: [
+        "NOTICE",
+    ],
+}
diff --git a/Android.mk b/Android.mk
new file mode 100644
index 0000000..87de94a
--- /dev/null
+++ b/Android.mk
@@ -0,0 +1,30 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+# WARNING: Everything listed here will be built on ALL platforms,
+# including x86, the universal, and the SDK.  Modules must be uniquely
+# named (liblights.panda), and must build everywhere, or limit themselves
+# to only building on ARM if they include assembly. Individual makefiles
+# are responsible for having their own logic, for fine-grained control.
+
+LOCAL_PATH := $(call my-dir)
+
+# if some modules are built directly from this directory (not subdirectories),
+# their rules should be written here.
+
+ifneq (,$(filter $(TARGET_DEVICE),felix))
+  include $(call all-makefiles-under,$(LOCAL_PATH))
+endif
diff --git a/AndroidProducts.mk b/AndroidProducts.mk
new file mode 100644
index 0000000..876733f
--- /dev/null
+++ b/AndroidProducts.mk
@@ -0,0 +1,23 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+PRODUCT_MAKEFILES := \
+    $(LOCAL_DIR)/aosp_felix.mk \
+    $(LOCAL_DIR)/factory_felix.mk
+
+
+COMMON_LUNCH_CHOICES := \
+    aosp_felix-userdebug
diff --git a/NOTICE b/NOTICE
new file mode 100644
index 0000000..316b4eb
--- /dev/null
+++ b/NOTICE
@@ -0,0 +1,190 @@
+
+   Copyright (c) 2014, The Android Open Source Project
+
+   Licensed under the Apache License, Version 2.0 (the "License");
+   you may not use this file except in compliance with the License.
+
+   Unless required by applicable law or agreed to in writing, software
+   distributed under the License is distributed on an "AS IS" BASIS,
+   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+   See the License for the specific language governing permissions and
+   limitations under the License.
+
+
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
+      other entities that control, are controlled by, or are under common
+      control with that entity. For the purposes of this definition,
+      "control" means (i) the power, direct or indirect, to cause the
+      direction or management of such entity, whether by contract or
+      otherwise, or (ii) ownership of fifty percent (50%) or more of the
+      outstanding shares, or (iii) beneficial ownership of such entity.
+
+      "You" (or "Your") shall mean an individual or Legal Entity
+      exercising permissions granted by this License.
+
+      "Source" form shall mean the preferred form for making modifications,
+      including but not limited to software source code, documentation
+      source, and configuration files.
+
+      "Object" form shall mean any form resulting from mechanical
+      transformation or translation of a Source form, including but
+      not limited to compiled object code, generated documentation,
+      and conversions to other media types.
+
+      "Work" shall mean the work of authorship, whether in Source or
+      Object form, made available under the License, as indicated by a
+      copyright notice that is included in or attached to the work
+      (an example is provided in the Appendix below).
+
+      "Derivative Works" shall mean any work, whether in Source or Object
+      form, that is based on (or derived from) the Work and for which the
+      editorial revisions, annotations, elaborations, or other modifications
+      represent, as a whole, an original work of authorship. For the purposes
+      of this License, Derivative Works shall not include works that remain
+      separable from, or merely link (or bind by name) to the interfaces of,
+      the Work and Derivative Works thereof.
+
+      "Contribution" shall mean any work of authorship, including
+      the original version of the Work and any modifications or additions
+      to that Work or Derivative Works thereof, that is intentionally
+      submitted to Licensor for inclusion in the Work by the copyright owner
+      or by an individual or Legal Entity authorized to submit on behalf of
+      the copyright owner. For the purposes of this definition, "submitted"
+      means any form of electronic, verbal, or written communication sent
+      to the Licensor or its representatives, including but not limited to
+      communication on electronic mailing lists, source code control systems,
+      and issue tracking systems that are managed by, or on behalf of, the
+      Licensor for the purpose of discussing and improving the Work, but
+      excluding communication that is conspicuously marked or otherwise
+      designated in writing by the copyright owner as "Not a Contribution."
+
+      "Contributor" shall mean Licensor and any individual or Legal Entity
+      on behalf of whom a Contribution has been received by Licensor and
+      subsequently incorporated within the Work.
+
+   2. Grant of Copyright License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
+      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+      copyright license to reproduce, prepare Derivative Works of,
+      publicly display, publicly perform, sublicense, and distribute the
+      Work and such Derivative Works in Source or Object form.
+
+   3. Grant of Patent License. Subject to the terms and conditions of
+      this License, each Contributor hereby grants to You a perpetual,
+      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
+      (except as stated in this section) patent license to make, have made,
+      use, offer to sell, sell, import, and otherwise transfer the Work,
+      where such license applies only to those patent claims licensable
+      by such Contributor that are necessarily infringed by their
+      Contribution(s) alone or by combination of their Contribution(s)
+      with the Work to which such Contribution(s) was submitted. If You
+      institute patent litigation against any entity (including a
+      cross-claim or counterclaim in a lawsuit) alleging that the Work
+      or a Contribution incorporated within the Work constitutes direct
+      or contributory patent infringement, then any patent licenses
+      granted to You under this License for that Work shall terminate
+      as of the date such litigation is filed.
+
+   4. Redistribution. You may reproduce and distribute copies of the
+      Work or Derivative Works thereof in any medium, with or without
+      modifications, and in Source or Object form, provided that You
+      meet the following conditions:
+
+      (a) You must give any other recipients of the Work or
+          Derivative Works a copy of this License; and
+
+      (b) You must cause any modified files to carry prominent notices
+          stating that You changed the files; and
+
+      (c) You must retain, in the Source form of any Derivative Works
+          that You distribute, all copyright, patent, trademark, and
+          attribution notices from the Source form of the Work,
+          excluding those notices that do not pertain to any part of
+          the Derivative Works; and
+
+      (d) If the Work includes a "NOTICE" text file as part of its
+          distribution, then any Derivative Works that You distribute must
+          include a readable copy of the attribution notices contained
+          within such NOTICE file, excluding those notices that do not
+          pertain to any part of the Derivative Works, in at least one
+          of the following places: within a NOTICE text file distributed
+          as part of the Derivative Works; within the Source form or
+          documentation, if provided along with the Derivative Works; or,
+          within a display generated by the Derivative Works, if and
+          wherever such third-party notices normally appear. The contents
+          of the NOTICE file are for informational purposes only and
+          do not modify the License. You may add Your own attribution
+          notices within Derivative Works that You distribute, alongside
+          or as an addendum to the NOTICE text from the Work, provided
+          that such additional attribution notices cannot be construed
+          as modifying the License.
+
+      You may add Your own copyright statement to Your modifications and
+      may provide additional or different license terms and conditions
+      for use, reproduction, or distribution of Your modifications, or
+      for any such Derivative Works as a whole, provided Your use,
+      reproduction, and distribution of the Work otherwise complies with
+      the conditions stated in this License.
+
+   5. Submission of Contributions. Unless You explicitly state otherwise,
+      any Contribution intentionally submitted for inclusion in the Work
+      by You to the Licensor shall be under the terms and conditions of
+      this License, without any additional terms or conditions.
+      Notwithstanding the above, nothing herein shall supersede or modify
+      the terms of any separate license agreement you may have executed
+      with Licensor regarding such Contributions.
+
+   6. Trademarks. This License does not grant permission to use the trade
+      names, trademarks, service marks, or product names of the Licensor,
+      except as required for reasonable and customary use in describing the
+      origin of the Work and reproducing the content of the NOTICE file.
+
+   7. Disclaimer of Warranty. Unless required by applicable law or
+      agreed to in writing, Licensor provides the Work (and each
+      Contributor provides its Contributions) on an "AS IS" BASIS,
+      WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+      implied, including, without limitation, any warranties or conditions
+      of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
+      PARTICULAR PURPOSE. You are solely responsible for determining the
+      appropriateness of using or redistributing the Work and assume any
+      risks associated with Your exercise of permissions under this License.
+
+   8. Limitation of Liability. In no event and under no legal theory,
+      whether in tort (including negligence), contract, or otherwise,
+      unless required by applicable law (such as deliberate and grossly
+      negligent acts) or agreed to in writing, shall any Contributor be
+      liable to You for damages, including any direct, indirect, special,
+      incidental, or consequential damages of any character arising as a
+      result of this License or out of the use or inability to use the
+      Work (including but not limited to damages for loss of goodwill,
+      work stoppage, computer failure or malfunction, or any and all
+      other commercial damages or losses), even if such Contributor
+      has been advised of the possibility of such damages.
+
+   9. Accepting Warranty or Additional Liability. While redistributing
+      the Work or Derivative Works thereof, You may choose to offer,
+      and charge a fee for, acceptance of support, warranty, indemnity,
+      or other liability obligations and/or rights consistent with this
+      License. However, in accepting such obligations, You may act only
+      on Your own behalf and on Your sole responsibility, not on behalf
+      of any other Contributor, and only if You agree to indemnify,
+      defend, and hold each Contributor harmless for any liability
+      incurred by, or claims asserted against, such Contributor by reason
+      of your accepting any such warranty or additional liability.
+
+   END OF TERMS AND CONDITIONS
+
diff --git a/aosp_felix.mk b/aosp_felix.mk
new file mode 100644
index 0000000..9cd514a
--- /dev/null
+++ b/aosp_felix.mk
@@ -0,0 +1,34 @@
+#
+# Copyright 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_LINUX_KERNEL_VERSION := 5.10
+
+DEVICE_USES_NO_TRUSTY := true
+USE_SWIFTSHADER := true
+BOARD_USES_SWIFTSHADER := true
+BOARD_WITHOUT_RADIO := true
+
+$(call inherit-product, device/google/gs201/aosp_common.mk)
+$(call inherit-product, device/google/felix/device-felix.mk)
+
+PRODUCT_NAME := aosp_felix
+PRODUCT_DEVICE := felix
+PRODUCT_MODEL := AOSP on Felix
+PRODUCT_BRAND := Android
+PRODUCT_MANUFACTURER := Google
+
+DEVICE_MANIFEST_FILE := \
+	device/google/felix/manifest.xml
diff --git a/audio/felix/audio-tables.mk b/audio/felix/audio-tables.mk
new file mode 100644
index 0000000..cabcd77
--- /dev/null
+++ b/audio/felix/audio-tables.mk
@@ -0,0 +1,73 @@
+#
+# Copyright (C) 2020 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+AUDIO_TABLE_FOLDER := felix
+
+# Platform Configuration for AudioHAL / SoundTriggerHAL
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_bluetooth_legacy_hal.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_bluetooth_legacy_hal.xml \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration.xml \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/audio_policy_configuration_a2dp_offload_disabled.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_policy_configuration_a2dp_offload_disabled.xml \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/audio_platform_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_platform_configuration.xml \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/sound_trigger_configuration.xml:$(TARGET_COPY_OUT_VENDOR)/etc/sound_trigger_configuration.xml
+
+# AudioEffectHAL Configuration
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/audio_effects.xml:$(TARGET_COPY_OUT_VENDOR)/etc/audio_effects.xml
+
+# Mixer Path Configuration for AudioHAL
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/config/mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths.xml
+
+# Speaker firmware files
+SPK_FIRMWARE_PATH := $(AUDIO_TABLE_FOLDER)/cs35l41/fw
+SPK_FIRMWARE_FULL_PATH := device/google/felix/audio/$(SPK_FIRMWARE_PATH)
+
+PRODUCT_COPY_FILES += $(call copy-files,$(wildcard  $(SPK_FIRMWARE_FULL_PATH)/*),$(TARGET_COPY_OUT_VENDOR)/firmware)
+
+# Audio tuning
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/recording.gatf:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/recording.gatf \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.dat \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.dat \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.dat \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.dat:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.dat \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/waves_config.ini \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/waves_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/waves_preset.mps
+
+# userdebug specific
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/BLUETOOTH.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/BLUETOOTH.mods \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSFREE.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSFREE.mods \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HANDSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HANDSET.mods \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/fortemedia/HEADSET.mods:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/HEADSET.mods
+
+#Bluenote files
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/template.xml:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/template.xml \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/bluenote/tuning_constraints_combination.xml:$(TARGET_COPY_OUT_VENDOR)/etc/aoc/tuning_constraints_combination.xml
+
+# Mixer Path Configuration for Audio Speaker Calibration Tool crus_sp_cal
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/cs35l41/crus_sp_cal_mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/crus_sp_cal_mixer_paths.xml
+
+# Waves ini/mps files for unit tests of halcontroller
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/test_config.ini \
+    device/google/felix/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/test_preset.mps
+
+endif
diff --git a/audio/felix/config/audio_effects.xml b/audio/felix/config/audio_effects.xml
new file mode 100644
index 0000000..1718057
--- /dev/null
+++ b/audio/felix/config/audio_effects.xml
@@ -0,0 +1,63 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<audio_effects_conf version="2.0" xmlns="http://schemas.android.com/audio/audio_effects_conf/v2_0">
+    <libraries>
+        <library name="bundle" path="libbundlewrapper.so"/>
+        <library name="reverb" path="libreverbwrapper.so"/>
+        <library name="visualizer_sw" path="libvisualizer.so"/>
+        <library name="downmix" path="libdownmix.so"/>
+        <library name="dynamics_processing" path="libdynproc.so"/>
+        <library name="loudness_enhancer" path="libldnhncr.so"/>
+        <library name="proxy" path="libeffectproxy.so"/>
+        <library name="offload_effect" path="liboffloadeffect.so"/>
+        <library name="haptic_generator" path="libhapticgenerator.so"/>
+    </libraries>
+    <effects>
+        <effectProxy name="bassboost" library="proxy" uuid="2f0871a2-c93c-4824-9664-42eb2909f2ef">
+            <libsw library="bundle" uuid="8631f300-72e2-11df-b57e-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="c7e3b29d-e797-4cf9-9912-17c1956510cc"/>
+        </effectProxy>
+        <effectProxy name="virtualizer" library="proxy" uuid="626499c6-647e-455e-8c45-2d106e23c755">
+            <libsw library="bundle" uuid="1d4033c0-8557-11df-9f2d-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="f8f88a03-fdf8-4554-8e60-77fbf8f2d3b0"/>
+        </effectProxy>
+        <effectProxy name="equalizer" library="proxy" uuid="49004f03-3391-4c44-97dd-a043d526ea7d">
+            <libsw library="bundle" uuid="ce772f20-847d-11df-bb17-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="50deaa30-4a83-4b1f-bfe3-dec6d605ede0"/>
+        </effectProxy>
+        <effect name="volume" library="bundle" uuid="119341a0-8469-11df-81f9-0002a5d5c51b"/>
+        <effectProxy name="reverb_env_aux" library="proxy" uuid="b8154738-a0a1-4fc0-bb79-c845a3197739">
+            <libsw library="reverb" uuid="4a387fc0-8ab3-11df-8bad-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="0c84bcd9-bce4-441b-ba9e-51f80897c949"/>
+        </effectProxy>
+        <effectProxy name="reverb_env_ins" library="proxy" uuid="ba0f19fe-8790-4831-a58b-1f3299dd0bae">
+            <libsw library="reverb" uuid="c7a511a0-a3bb-11df-860e-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="86d1877a-127f-4bdc-9665-c958903ad7b2"/>
+        </effectProxy>
+        <effectProxy name="reverb_pre_aux" library="proxy" uuid="80974a8b-b3be-4c21-8c0b-b392a54e13bc">
+            <libsw library="reverb" uuid="f29a1400-a3bb-11df-8ddc-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="4f90220c-9742-4467-a9d7-122f85c01195"/>
+        </effectProxy>
+        <effectProxy name="reverb_pre_ins" library="proxy" uuid="c02d7dce-ca56-4aea-8c83-bbb53e5600e8">
+            <libsw library="reverb" uuid="172cdf00-a3bc-11df-a72f-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="a2cf6b45-360b-49f3-94d7-fdb9837f89e8"/>
+        </effectProxy>
+        <effectProxy name="visualizer" library="proxy" uuid="b27271d9-64d6-413c-b316-80005ad09008">
+            <libsw library="visualizer_sw" uuid="d069d9e0-8329-11df-9168-0002a5d5c51b"/>
+            <libhw library="offload_effect" uuid="99fb2ecb-3426-4a0e-8082-1a1da5604b7d"/>
+        </effectProxy>
+        <effect name="downmix" library="downmix" uuid="93f04452-e4fe-41cc-91f9-e475b6d1d69f"/>
+        <effect name="loudness_enhancer" library="loudness_enhancer" uuid="fa415329-2034-4bea-b5dc-5b381c8d1e2c"/>
+        <effect name="aec" library="offload_effect" uuid="28c28780-ec8b-48b6-8590-8c84557d797d"/>
+        <effect name="ns" library="offload_effect" uuid="62ff2836-d050-43c3-9c2d-94a73dad2c64"/>
+        <effect name="haptic_generator" library="haptic_generator" uuid="97c4acd1-8b82-4f2f-832e-c2fe5d7a9931"/>
+        <effect name="dynamics_processing" library="dynamics_processing" uuid="e0e6539b-1781-7261-676f-6d7573696340"/>
+    </effects>
+    <postprocess>
+    </postprocess>
+    <preprocess>
+        <stream type="voice_communication">
+            <apply effect="aec"/>
+            <apply effect="ns"/>
+        </stream>
+    </preprocess>
+</audio_effects_conf>
diff --git a/audio/felix/config/audio_platform_configuration.xml b/audio/felix/config/audio_platform_configuration.xml
new file mode 100644
index 0000000..f8cd663
--- /dev/null
+++ b/audio/felix/config/audio_platform_configuration.xml
@@ -0,0 +1,295 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2019, The Linux Foundation. All rights reserved.         -->
+<!--                                                                        -->
+<!-- Redistribution and use in source and binary forms, with or without     -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met:                                                                   -->
+<!--     * Redistributions of source code must retain the above copyright   -->
+<!--       notice, this list of conditions and the following disclaimer.    -->
+<!--     * Redistributions in binary form must reproduce the above          -->
+<!--       copyright notice, this list of conditions and the following      -->
+<!--       disclaimer in the documentation and/or other materials provided  -->
+<!--       with the distribution.                                           -->
+<!--     * Neither the name of The Linux Foundation nor the names of its    -->
+<!--       contributors may be used to endorse or promote products derived  -->
+<!--       from this software without specific prior written permission.    -->
+<!--                                                                        -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED           -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF   -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF   -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,  -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          -->
+<audio_platform_configuration>
+    <hw_intf>
+        <intf id="BE_HW_RX_INTF_0" name="TDM_RX_0" min_bit="24" min_chan="2" min_rate="48000" block_id="16"/>
+        <intf id="BE_HW_RX_INTF_1" name="TDM_RX_1" min_bit="24" min_chan="2" min_rate="48000" block_id="17"/>
+        <intf id="BE_HW_RX_INTF_2" name="USB_RX" min_bit="24" min_chan="2" min_rate="48000" block_id="20"/>
+        <intf id="BE_HW_RX_INTF_3" name="I2S_RX_0" min_bit="24" min_chan="2" min_rate="48000" block_id="18"/>
+        <!--intf id="BE_HW_RX_INTF_2" name="USB_RX" min_bit="24" min_chan="2" min_rate="48000" ctrl_config="USB device" ctrl_rate="Sample Rate" ctrl_bit="Bit Width" ctrl_chan="Channel"/-->
+        <!--intf id="BE_HW_RX_INTF_3" name="BT_RX"/-->
+        <intf id="BE_VIRTUAL_VOICE_RX_TUNING" block_id="19"/>
+        <intf id="BE_VIRTUAL_VOICE_TX_TUNING" block_id="19"/>
+        <intf id="BE_HW_TX_INTF_0" block_id="134,128,137"/>
+    </hw_intf>
+
+    <product_lists>
+        <product name="Blackbird">
+            <id value="18d1:5033"/>
+        </product>
+        <product name="Condor">
+            <id value="18d1:5034"/>
+        </product>
+        <product name="Condor_Sprint">
+            <id value="18d1:5038"/>
+        </product>
+        <product name="Condor_Sprint2">
+            <id value="18d1:5036"/>
+        </product>
+    </product_lists>
+
+    <!-- The microphone capability is fake data -->
+    <microphone_characteristics>
+        <microphone device_id="builtin_mic_1" type="AUDIO_DEVICE_IN_BUILTIN_MIC" address="bottom" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+            group="0" index_in_the_group="0" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="93"
+            frequencies="100.00 106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00 20000.00"
+            responses="-0.78 -0.71 -0.64 -0.60 -0.55 -0.50 -0.47 -0.42 -0.39 -0.36 -0.34 -0.33 -0.32 -0.29 -0.28 -0.28 -0.27 -0.25 -0.25 -0.24 -0.23 -0.23 -0.22 -0.22 -0.19 -0.17 -0.15 -0.15 -0.14 -0.14 -0.12 -0.11 -0.10 -0.10 -0.08 -0.07 -0.07 -0.04 -0.03 -0.01 0.00 0.04 0.06 0.07 0.08 0.13 0.09 0.14 0.19 0.23 0.28 0.29 0.31 0.37 0.88 0.86 0.77 0.78 0.84 0.86 1.05 1.12 1.18 1.25 1.43 1.66 1.83 2.02 2.23 2.59 2.84 3.35 4.01 6.82 6.62 6.42 7.30 8.23 7.54 12.68 13.76 18.69 19.68 20.90 23.70 25.10 21.65 16.18 18.84 25.44 23.48 23.22 24.89"
+            sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 0.0 1.0" geometric_location="0.0269 0.0058 0.0079" />
+        <microphone device_id="builtin_mic_2" type="AUDIO_DEVICE_IN_BACK_MIC" address="back" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+            group="0" index_in_the_group="1" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="92"
+            frequencies="106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00 20000.00"
+            responses="-0.75 -0.74 -0.69 -0.65 -0.62 -0.61 -0.56 -0.53 -0.50 -0.47 -0.43 -0.40 -0.37 -0.36 -0.33 -0.30 -0.28 -0.25 -0.24 -0.24 -0.24 -0.25 -0.24 -0.12 -0.10 -0.08 -0.09 -0.07 -0.07 -0.06 -0.06 -0.06 -0.05 -0.04 -0.05 -0.04 -0.01 0.02 0.02 0.00 0.02 0.03 0.07 0.10 0.10 0.13 0.01 0.01 0.10 0.11 0.19 0.24 0.38 0.46 0.26 0.27 0.43 0.76 0.75 1.09 1.09 0.94 1.06 1.21 1.47 1.45 1.36 2.07 2.85 2.90 3.85 4.65 5.84 5.46 6.15 7.50 8.30 10.62 12.70 16.65 20.95 25.41 26.32 20.20 16.60 11.24 7.85 7.62 20.19 7.32 2.87 5.18"
+            sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 1.0 0.0" geometric_location="0.0546 0.1456 0.00415" />
+        <microphone device_id="builtin_mic_3" type="AUDIO_DEVICE_IN_BUILTIN_MIC" address="top" location="AUDIO_MICROPHONE_LOCATION_MAINBODY"
+            group="0" index_in_the_group="2" directionality="AUDIO_MICROPHONE_DIRECTIONALITY_OMNI" num_frequency_responses="92"
+            frequencies="100.00 106.00 112.00 118.00 125.00 132.00 140.00 150.00 160.00 170.00 180.00 190.00 200.00 212.00 224.00 236.00 250.00 265.00 280.00 300.00 315.00 335.00 355.00 375.00 400.00 425.00 450.00 475.00 500.00 530.00 560.00 600.00 630.00 670.00 710.00 750.00 800.00 850.00 900.00 950.00 1000.00 1060.00 1120.00 1180.00 1250.00 1320.00 1400.00 1500.00 1600.00 1700.00 1800.00 1900.00 2000.00 2120.00 2240.00 2360.00 2500.00 2650.00 2800.00 3000.00 3150.00 3350.00 3550.00 3750.00 4000.00 4250.00 4500.00 4750.00 5000.00 5300.00 5600.00 6000.00 6300.00 6700.00 7100.00 7500.00 8000.00 8500.00 9000.00 9500.00 10000.00 10600.00 11200.00 11800.00 12500.00 13200.00 14000.00 15000.00 16000.00 17000.00 18000.00 19000.00"
+            responses="-9.24 -9.31 -9.39 -9.45 -9.46 -9.47 -9.50 -9.52 -9.51 -9.52 -9.51 -9.50 -9.49 -9.47 -9.48 -9.49 -9.48 -9.50 -9.51 -9.53 -9.55 -9.59 -9.63 -9.67 -9.58 -9.57 -9.65 -9.68 -9.71 -9.75 -9.79 -9.84 -9.87 -9.87 -9.90 -9.90 -9.91 -9.97 -10.01 -10.05 -9.85 -9.93 -9.94 -9.98 -10.04 -10.12 -10.28 -10.25 -10.01 -9.86 -9.81 -9.82 -9.61 -9.46 -8.27 -8.42 -8.98 -8.99 -8.82 -9.21 -8.92 -8.97 -9.30 -9.44 -9.52 -9.28 -9.09 -8.81 -7.02 -5.72 -5.30 -7.26 -8.39 -12.28 -8.23 -6.99 -5.52 -4.87 -3.82 -6.09 0.00 -2.15 -0.26 1.48 5.22 10.92 6.41 9.55 12.96 3.35 22.00 19.75"
+            sensitivity="-37.0" max_spl="132.5" min_spl="28.5" orientation="0.0 0.0 1.0" geometric_location="0.0274 0.14065 0.0079" />
+    </microphone_characteristics>
+
+    <!-- The microphone mapping of backend device is fake data -->
+    <input_backend_cfg_mic_mapping>
+            <backend_cfg in_cfg="IN_CAMCORDER_LANDSCAPE_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_CAMCORDER_PORTRAIT_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_HANDSET_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_VOICECALL_HANDSET_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_VOICECALL_SPEAKER_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_USB_TTY_VCO_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED AUDIO_MICROPHONE_CHANNEL_MAPPING_PROCESSED"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_VOICE_RECOGN_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_UNPROCESSED_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_UNPROCESSED_DUAL_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT"/>
+            </backend_cfg>
+            <backend_cfg in_cfg="IN_UNPROCESSED_TRIPLE_MIC_BE_CFG">
+                <mic_info mic_device_id="builtin_mic_1"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED"/>
+                <mic_info mic_device_id="builtin_mic_2"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED"/>
+                <mic_info mic_device_id="builtin_mic_3"
+                    channel_mapping="AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED AUDIO_MICROPHONE_CHANNEL_MAPPING_UNUSED AUDIO_MICROPHONE_CHANNEL_MAPPING_DIRECT"/>
+            </backend_cfg>
+    </input_backend_cfg_mic_mapping>
+
+    <usecase_attr>
+        <!-- for output with AUDIO_OUTPUT_FLAG_RAW, 32 periods * 64 frames(around 1.3ms) * 2ch * 4(s32) = 16384 bytes -->
+        <usecase id="UC_RAW_PLAYBACK" dev1="23" dyn_path="true" dsp_vol="false" mmap="true" period="64" period_num="32"/>
+        <!-- for output with AUDIO_OUTPUT_FLAG_PRIMARY|AUDIO_OUTPUT_FLAG_FAST, 4 * 10ms buffer -->
+        <usecase id="UC_LOW_LATENCY_PLAYBACK" dev1="1" dyn_path="true" dsp_vol="false" mmap="false" period="10" period_num="4"/>
+        <!-- for output with AUDIO_OUTPUT_FLAG_MMAP_NOIRQ, 80 periods * 48 frames/period(=1ms w/ 48k sample rate) * 4 bytes/frame = 15360 bytes -->
+        <usecase id="UC_MMAP_PLAYBACK" dev1="0" dyn_path="true" dsp_vol="false" mmap="true" period="1" period_num="80"/>
+        <!-- for output with AUDIO_OUTPUT_FLAG_DEEP_BUFFER, 4 * 20ms buffer -->
+        <usecase id="UC_DEEP_BUFFER_PLAYBACK" dev1="5" dyn_path="true" dsp_vol="false" mmap="false" period="20" period_num="4"/>
+        <!-- dev1: voice-call downlink dev2: voice-clal uplink -->
+        <usecase id="UC_VOICE_CALL" dev1="4" dev2="11"/>
+        <usecase id="UC_IMMERSIVE_PLAYBACK" dev1="3"/>
+        <!-- for output with AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD, 4 * 128KB buffer -->
+        <usecase id="UC_COMPRESSED_OFFLOAD_PLAYBACK" dev1="6" dyn_path="true" dsp_vol="true" mmap="false" period="131072" period_num="4" pre_proc_id="14"/>
+        <!-- dev1: audio dev2: haptic -->
+        <usecase id="UC_HAPTIC_AUDIO" dev1="2" dev2="7" period="10" period_num="4"/>
+        <!-- for VOIP output, 4 * 10ms buffer -->
+        <usecase id="UC_VOIP_PLAYBACK" dev1="16" dyn_path="true" dsp_vol="true" mmap="false" period="10" period_num="4"/>
+        <!-- for input -->
+        <usecase id="UC_AUDIO_RECORD" dev1="8" dyn_path="true" dsp_vol="false" mmap="false" period="20" period_num="4"/>
+        <usecase id="UC_HOSTLESS_UL" dev1="15"/>
+        <!-- for VOIP input, 4 * 10ms buffer -->
+        <usecase id="UC_VOIP_RECORD" dev1="17" dyn_path="true" dsp_vol="false" mmap="false" period="20" period_num="2"/>
+        <!-- for input wit AUDIO_INPUT_FLAG_FAST  480 periods * 1ms buffer, 16-bit, 2ch, buffer size 92160 bytes-->
+        <usecase id="UC_LOW_LATENCY_AUDIO_RECORD" dev1="10" dyn_path="true" dsp_vol="false" mmap="true" period="1" period_num="480"/>
+        <!-- for input wit AUDIO_INPUT_FLAG_MMAP_NOIRQ 240 periods * 1ms buffer, 32-bit,2 ch, buffer size 92160 bytes -->
+        <usecase id="UC_MMAP_RECORD" dev1="9" dyn_path="true" dsp_vol="false" mmap="true" period="1" period_num="240"/>
+        <!-- for hifi -->
+        <usecase id="UC_HIFI_PLAYBACK" dev1="25"/>
+        <usecase id="UC_HIFI_RECORD" dev1="26"/>
+    </usecase_attr>
+
+    <dsp_latency>
+        <usecase id="UC_LOW_LATENCY_PLAYBACK" type="playback">
+            <be_cfg be_id="OUT_SPEAKER_BE_CFG" latency="20000"/>
+            <be_cfg be_id="OUT_USB_HEADSET_BE_CFG" latency="10000"/>
+            <be_cfg be_id="OUT_USB_HEADPHONE_BE_CFG" latency="10000"/>
+            <be_cfg be_id="OUT_A2DP_BE_CFG" latency="10000"/>
+        </usecase>
+
+        <usecase id="UC_DEEP_BUFFER_PLAYBACK" type="playback">
+            <be_cfg be_id="OUT_SPEAKER_BE_CFG" latency="70000"/>
+            <be_cfg be_id="OUT_USB_HEADSET_BE_CFG" latency="70000"/>
+            <be_cfg be_id="OUT_USB_HEADPHONE_BE_CFG" latency="70000"/>
+            <be_cfg be_id="OUT_A2DP_BE_CFG" latency="180000"/>
+        </usecase>
+
+        <usecase id="UC_AUDIO_RECORD" type="capture">
+            <be_cfg be_id="IN_CAMCORDER_LANDSCAPE_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_CAMCORDER_PORTRAIT_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" latency="160000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_BE_CFG" latency="40000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_NREC_BE_CFG" latency="40000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_WB_BE_CFG" latency="40000"/>
+            <be_cfg be_id="IN_BTSCO_MIC_WB_NREC_BE_CFG" latency="40000"/>
+        </usecase>
+    </dsp_latency>
+
+    <soundcard_name name="google,aoc-snd-card" />
+
+    <cfg_attr>
+        <cfg id="OUT_SPEAKER_BE_CFG" intf_name="TDM_RX_0" mux="HW_MUX_GP_0" tuning_id="2"/>
+        <cfg id="OUT_HAC_HANDSET_BE_CFG" intf_name="TDM_RX_1" mux="HW_MUX_GP_1" be_path="hac-handset"/>
+        <cfg id="OUT_USB_HEADSET_BE_CFG">
+            <override product="Blackbird" tuning_id="22"/>
+            <override product="Condor" tuning_id="33"/>
+        </cfg>
+        <cfg id="OUT_USB_TTY_FULL_BE_CFG" be_path="usb-headphone" codec_path="usb-headphone"/>
+        <cfg id="OUT_USB_TTY_VCO_BE_CFG" be_path="usb-headphone" codec_path="usb-headphone"/>
+        <cfg id="OUT_USB_TTY_HCO_BE_CFG" be_path="NULL" codec_path="voice-speaker"/>
+        <cfg id="IN_USB_TTY_FULL_MIC_BE_CFG" be_path="usb-headset-mic" codec_path="usb-headset-mic" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_USB_TTY_VCO_MIC_BE_CFG" be_path="NULL" codec_path="voice-speaker-mic"/>
+        <cfg id="IN_USB_TTY_HCO_MIC_BE_CFG" be_path="usb-headset-mic" codec_path="usb-headset-mic" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_SPK_VI_BE_CFG" codec_path="NULL" be_path="spk-vi"/>
+        <cfg id="IN_HANDSET_MIC_BE_CFG" tuning_id="62"/>
+        <cfg id="IN_HANDSET_DUAL_MIC_BE_CFG" tuning_id="63"/>
+        <cfg id="IN_HANDSET_TRIPLE_MIC_BE_CFG" tuning_id="64"/>
+        <cfg id="IN_CAMCORDER_LANDSCAPE_BE_CFG" tuning_id="70"/>
+        <cfg id="IN_CAMCORDER_INVERT_LANDSCAPE_BE_CFG" tuning_id="71"/>
+        <cfg id="IN_CAMCORDER_PORTRAIT_BE_CFG" tuning_id="72"/>
+        <cfg id="IN_CAMCORDER_SELFIE_LANDSCAPE_BE_CFG" tuning_id="73"/>
+        <cfg id="IN_CAMCORDER_SELFIE_INVERT_LANDSCAPE_BE_CFG" tuning_id="74"/>
+        <cfg id="IN_CAMCORDER_SELFIE_PORTRAIT_BE_CFG" tuning_id="75"/>
+        <cfg id="IN_CAMCORDER_MIC_BE_CFG" tuning_id="70"/>
+        <cfg id="IN_CAMCORDER_TRIPLE_MIC_BE_CFG" tuning_id="70"/>
+        <cfg id="IN_BTSCO_MIC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_BTSCO_MIC_NREC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_BTSCO_MIC_WB_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_BTSCO_MIC_WB_NREC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_VOICE_RECOGN_USB_HEADSET_MIC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_USB_HEADSET_MIC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_VOICECALL_USB_HEADSET_MIC_BE_CFG" mux="HW_MUX_GP_0"/>
+        <cfg id="IN_UNPROCESSED_USB_HEADSET_MIC_BE_CFG" mux="HW_MUX_GP_0"/>
+    </cfg_attr>
+
+    <xlate_id>
+        <item component="TUNING_COMPONENT_WAVES" id="2"/>
+        <item component="TUNING_COMPONENT_FORTEMEDIA" id="3"/>
+        <item component="TUNING_COMPONENT_CAMCORDER" id="6"/>
+    </xlate_id>
+
+    <voip_db_mapping>
+        <voip_path id="VOIP_RX_USB" value="0.01,0.02,0.04,0.1,0.21,0.47,1.0"/>
+    </voip_db_mapping>
+
+    <device_handle>
+        <handler libname="audio_bt_aoc.so"/>
+        <handler libname="audio_usb_aoc.so" argu="MaxSamplingRate=96000,UnsupportedFormat=S24_LE"/>
+    </device_handle>
+
+    <external_module>
+        <module libname="audio_waves_aoc.so" argu="Sink=SPK:1"/>
+        <module libname="audio_spk_35l41.so"/>
+        <module libname="audio_fortemedia_aoc.so"/>
+        <module libname="liboffloadeffect.so"/>
+        <module libname="audio_amcs_ext.so"/>
+        <module libname="audio_bluenote_aoc.so"/>
+    </external_module>
+</audio_platform_configuration>
diff --git a/audio/felix/config/audio_policy_configuration.xml b/audio/felix/config/audio_policy_configuration.xml
new file mode 100644
index 0000000..6093ec9
--- /dev/null
+++ b/audio/felix/config/audio_policy_configuration.xml
@@ -0,0 +1,251 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+     Licensed under the Apache License, Version 2.0 (the "License");
+     you may not use this file except in compliance with the License.
+     You may obtain a copy of the License at
+          http://www.apache.org/licenses/LICENSE-2.0
+     Unless required by applicable law or agreed to in writing, software
+     distributed under the License is distributed on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+     See the License for the specific language governing permissions and
+     limitations under the License.
+-->
+<audioPolicyConfiguration version="7.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+    <globalConfiguration speaker_drc_enabled="false" call_screen_mode_supported="true" />
+    <modules>
+        <!-- Primary Audio HAL -->
+        <module name="primary" halVersion="2.0">
+            <attachedDevices>
+                <item>Speaker</item>
+                <item>Speaker Safe</item>
+                <item>Earpiece</item>
+                <item>Built-In Mic</item>
+                <item>Built-In Back Mic</item>
+                <item>Telephony Tx</item>
+                <item>Voice Call And Telephony Rx</item>
+                <item>Echo Ref In</item>
+            </attachedDevices>
+            <defaultOutputDevice>Speaker</defaultOutputDevice>
+            <mixPorts>
+                <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="compressed_offload" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                    <profile name="" format="AUDIO_FORMAT_MP3"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_LC"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V1"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                </mixPort>
+                <mixPort name="haptic" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO_HAPTIC_AB" />
+                </mixPort>
+                <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_out" role="source" flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="immersive_out" role="source" flags="AUDIO_OUTPUT_FLAG_FAST AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="incall playback" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_INCALL_MUSIC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voice call tx" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voip_rx" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_VOIP_RX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                           samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="primary input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO AUDIO_CHANNEL_INDEX_MASK_3"/>
+                </mixPort>
+                <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="8000 11025 12000 16000 22050 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="incall capture" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voice call rx" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voip_tx" role="sink"
+                         flags="AUDIO_INPUT_FLAG_VOIP_TX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="fast input" role="sink" flags="AUDIO_INPUT_FLAG_RAW AUDIO_INPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_in" role="sink" flags="AUDIO_INPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="hifi_playback" role="source" />
+                <mixPort name="hifi_input" role="sink" />
+                <mixPort name="echo_ref_input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+                <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker" type="AUDIO_DEVICE_OUT_SPEAKER" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="Telephony Tx" type="AUDIO_DEVICE_OUT_TELEPHONY_TX" role="sink">
+                </devicePort>
+                <!-- Input devices declaration, i.e. Source DEVICE PORT -->
+                <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+                </devicePort>
+                <devicePort tagName="BT A2DP Out" type="AUDIO_DEVICE_OUT_BLUETOOTH_A2DP" role="sink"
+                            encodedFormats="AUDIO_FORMAT_AAC AUDIO_FORMAT_SBC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100 48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+                <devicePort tagName="BT A2DP Headphones" type="AUDIO_DEVICE_OUT_BLUETOOTH_A2DP_HEADPHONES" role="sink"
+                            encodedFormats="AUDIO_FORMAT_AAC AUDIO_FORMAT_SBC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100 48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+                <devicePort tagName="BT A2DP Speaker" type="AUDIO_DEVICE_OUT_BLUETOOTH_A2DP_SPEAKER" role="sink"
+                            encodedFormats="AUDIO_FORMAT_AAC AUDIO_FORMAT_SBC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100 48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+                <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+                </devicePort>
+                <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+                </devicePort>
+                <!-- AUDIO_DEVICE_IN_VOICE_CALL and AUDIO_DEVICE_IN_TELEPHONY_RX are in the same value -->
+                <devicePort tagName="Voice Call And Telephony Rx" type="AUDIO_DEVICE_IN_VOICE_CALL" role="source">
+                </devicePort>
+                <devicePort tagName="Echo Ref In" type="AUDIO_DEVICE_IN_ECHO_REFERENCE" role="source">
+                </devicePort>
+            </devicePorts>
+            <!-- route declaration, i.e. list all available sources for a given sink -->
+            <routes>
+                <route type="mix" sink="Speaker"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,immersive_out"/>
+                <route type="mix" sink="Speaker Safe"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="Earpiece"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="BT A2DP Out"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx,immersive_out"/>
+                <route type="mix" sink="BT A2DP Headphones"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx,immersive_out"/>
+                <route type="mix" sink="BT A2DP Speaker"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx,immersive_out"/>
+                <route type="mix" sink="USB Device Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="USB Headset Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="BT SCO"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Headset"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Car Kit"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="Telephony Tx" sources="incall playback,voice call tx" />
+                <route type="mix" sink="primary input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="hotword input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="incall capture" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voice call rx" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voip_tx"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="fast input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="mmap_no_irq_in"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="hifi_input" sources="USB Device In,USB Headset In" />
+                <route type="mix" sink="echo_ref_input" sources="Echo Ref In"/>
+            </routes>
+        </module>
+        <!-- Bluetooth Audio HAL -->
+        <xi:include href="bluetooth_audio_policy_configuration_7_0.xml"/>
+        <!-- Usb Audio HAL -->
+        <module name="usbv2" halVersion="2.0">
+            <mixPorts>
+                <mixPort name="usb_accessory output" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+            </devicePorts>
+            <routes>
+                <route type="mix" sink="USB Host Out"
+                       sources="usb_accessory output"/>
+            </routes>
+        </module>
+        <!-- Remote Submix Audio HAL -->
+        <xi:include href="r_submix_audio_policy_configuration.xml"/>
+    </modules>
+    <!-- End of Modules section -->
+    <!-- Volume section -->
+    <xi:include href="audio_policy_volumes.xml"/>
+    <xi:include href="default_volume_tables.xml"/>
+    <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/felix/config/audio_policy_configuration_a2dp_offload_disabled.xml b/audio/felix/config/audio_policy_configuration_a2dp_offload_disabled.xml
new file mode 100644
index 0000000..085c19c
--- /dev/null
+++ b/audio/felix/config/audio_policy_configuration_a2dp_offload_disabled.xml
@@ -0,0 +1,232 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+     Licensed under the Apache License, Version 2.0 (the "License");
+     you may not use this file except in compliance with the License.
+     You may obtain a copy of the License at
+          http://www.apache.org/licenses/LICENSE-2.0
+     Unless required by applicable law or agreed to in writing, software
+     distributed under the License is distributed on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+     See the License for the specific language governing permissions and
+     limitations under the License.
+-->
+<audioPolicyConfiguration version="7.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+    <globalConfiguration speaker_drc_enabled="false" call_screen_mode_supported="true" />
+    <modules>
+        <!-- Primary Audio HAL -->
+        <module name="primary" halVersion="2.0">
+            <attachedDevices>
+                <item>Speaker</item>
+                <item>Speaker Safe</item>
+                <item>Earpiece</item>
+                <item>Built-In Mic</item>
+                <item>Built-In Back Mic</item>
+                <item>Telephony Tx</item>
+                <item>Voice Call And Telephony Rx</item>
+                <item>Echo Ref In</item>
+            </attachedDevices>
+            <defaultOutputDevice>Speaker</defaultOutputDevice>
+            <mixPorts>
+                <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="compressed_offload" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                    <profile name="" format="AUDIO_FORMAT_MP3"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_LC"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V1"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                </mixPort>
+                <mixPort name="haptic" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO_HAPTIC_AB" />
+                </mixPort>
+                <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_out" role="source" flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="immersive_out" role="source" flags="AUDIO_OUTPUT_FLAG_FAST AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="incall playback" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_INCALL_MUSIC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voice call tx" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voip_rx" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_VOIP_RX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                           samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="primary input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO AUDIO_CHANNEL_INDEX_MASK_3"/>
+                </mixPort>
+                <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="8000 11025 12000 16000 22050 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="incall capture" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voice call rx" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voip_tx" role="sink"
+                         flags="AUDIO_INPUT_FLAG_VOIP_TX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="fast input" role="sink" flags="AUDIO_INPUT_FLAG_RAW AUDIO_INPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_in" role="sink" flags="AUDIO_INPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="hifi_playback" role="source" />
+                <mixPort name="hifi_input" role="sink" />
+                <mixPort name="echo_ref_input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+                <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker" type="AUDIO_DEVICE_OUT_SPEAKER" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="Telephony Tx" type="AUDIO_DEVICE_OUT_TELEPHONY_TX" role="sink">
+                </devicePort>
+                <!-- Input devices declaration, i.e. Source DEVICE PORT -->
+                <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="Wired Headset Mic" type="AUDIO_DEVICE_IN_WIRED_HEADSET" role="source">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+                </devicePort>
+                <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+                </devicePort>
+                <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+                </devicePort>
+                <!-- AUDIO_DEVICE_IN_VOICE_CALL and AUDIO_DEVICE_IN_TELEPHONY_RX are in the same value -->
+                <devicePort tagName="Voice Call And Telephony Rx" type="AUDIO_DEVICE_IN_VOICE_CALL" role="source">
+                </devicePort>
+                <devicePort tagName="Echo Ref In" type="AUDIO_DEVICE_IN_ECHO_REFERENCE" role="source">
+                </devicePort>
+            </devicePorts>
+            <!-- route declaration, i.e. list all available sources for a given sink -->
+            <routes>
+                <route type="mix" sink="Speaker"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,immersive_out"/>
+                <route type="mix" sink="Speaker Safe"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="Earpiece"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="USB Device Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="USB Headset Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="BT SCO"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Headset"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Car Kit"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="Telephony Tx" sources="incall playback,voice call tx" />
+                <route type="mix" sink="primary input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="hotword input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="incall capture" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voice call rx" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voip_tx"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="fast input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="mmap_no_irq_in"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="hifi_input" sources="USB Device In,USB Headset In" />
+                <route type="mix" sink="echo_ref_input" sources="Echo Ref In"/>
+            </routes>
+        </module>
+        <!-- Bluetooth Audio HAL -->
+        <xi:include href="bluetooth_audio_policy_configuration_7_0.xml"/>
+        <!-- Usb Audio HAL -->
+        <module name="usbv2" halVersion="2.0">
+            <mixPorts>
+                <mixPort name="usb_accessory output" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+            </devicePorts>
+            <routes>
+                <route type="mix" sink="USB Host Out"
+                       sources="usb_accessory output"/>
+            </routes>
+        </module>
+        <!-- Remote Submix Audio HAL -->
+        <xi:include href="r_submix_audio_policy_configuration.xml"/>
+    </modules>
+    <!-- End of Modules section -->
+    <!-- Volume section -->
+    <xi:include href="audio_policy_volumes.xml"/>
+    <xi:include href="default_volume_tables.xml"/>
+    <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/felix/config/audio_policy_configuration_bluetooth_legacy_hal.xml b/audio/felix/config/audio_policy_configuration_bluetooth_legacy_hal.xml
new file mode 100644
index 0000000..e10e883
--- /dev/null
+++ b/audio/felix/config/audio_policy_configuration_bluetooth_legacy_hal.xml
@@ -0,0 +1,232 @@
+<?xml version="1.0" encoding="UTF-8" standalone="yes"?>
+<!-- Copyright (C) 2020 The Android Open Source Project
+     Licensed under the Apache License, Version 2.0 (the "License");
+     you may not use this file except in compliance with the License.
+     You may obtain a copy of the License at
+          http://www.apache.org/licenses/LICENSE-2.0
+     Unless required by applicable law or agreed to in writing, software
+     distributed under the License is distributed on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+     See the License for the specific language governing permissions and
+     limitations under the License.
+-->
+<audioPolicyConfiguration version="7.0" xmlns:xi="http://www.w3.org/2001/XInclude">
+    <globalConfiguration speaker_drc_enabled="false" call_screen_mode_supported="true" />
+    <modules>
+        <!-- Primary Audio HAL -->
+        <module name="primary" halVersion="2.0">
+            <attachedDevices>
+                <item>Speaker</item>
+                <item>Speaker Safe</item>
+                <item>Earpiece</item>
+                <item>Built-In Mic</item>
+                <item>Built-In Back Mic</item>
+                <item>Telephony Tx</item>
+                <item>Voice Call And Telephony Rx</item>
+                <item>Echo Ref In</item>
+            </attachedDevices>
+            <defaultOutputDevice>Speaker</defaultOutputDevice>
+            <mixPorts>
+                <mixPort name="primary output" role="source" flags="AUDIO_OUTPUT_FLAG_PRIMARY AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="deep buffer" role="source" flags="AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="compressed_offload" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_COMPRESS_OFFLOAD AUDIO_OUTPUT_FLAG_NON_BLOCKING">
+                    <profile name="" format="AUDIO_FORMAT_MP3"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_LC"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V1"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                    <profile name="" format="AUDIO_FORMAT_AAC_HE_V2"
+                             samplingRates="8000 16000 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO AUDIO_CHANNEL_OUT_MONO"/>
+                </mixPort>
+                <mixPort name="haptic" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO_HAPTIC_AB" />
+                </mixPort>
+                <mixPort name="raw" role="source" flags="AUDIO_OUTPUT_FLAG_RAW AUDIO_OUTPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_out" role="source" flags="AUDIO_OUTPUT_FLAG_DIRECT AUDIO_OUTPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="immersive_out" role="source" flags="AUDIO_OUTPUT_FLAG_FAST AUDIO_OUTPUT_FLAG_DEEP_BUFFER">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="incall playback" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_INCALL_MUSIC">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voice call tx" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_OUT_STEREO" />
+                </mixPort>
+                <mixPort name="voip_rx" role="source"
+                         flags="AUDIO_OUTPUT_FLAG_VOIP_RX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                           samplingRates="48000" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+                <mixPort name="primary input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO AUDIO_CHANNEL_INDEX_MASK_3"/>
+                </mixPort>
+                <mixPort name="hotword input" role="sink" flags="AUDIO_INPUT_FLAG_HW_HOTWORD" maxActiveCount="0" >
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="8000 11025 12000 16000 22050 24000 32000 44100 48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="incall capture" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voice call rx" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="voip_tx" role="sink"
+                         flags="AUDIO_INPUT_FLAG_VOIP_TX">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000" channelMasks="AUDIO_CHANNEL_IN_MONO"/>
+                </mixPort>
+                <mixPort name="fast input" role="sink" flags="AUDIO_INPUT_FLAG_RAW AUDIO_INPUT_FLAG_FAST">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="mmap_no_irq_in" role="sink" flags="AUDIO_INPUT_FLAG_MMAP_NOIRQ">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_MONO AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+                <mixPort name="hifi_playback" role="source" />
+                <mixPort name="hifi_input" role="sink" />
+                <mixPort name="echo_ref_input" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_32_BIT"
+                             samplingRates="48000"
+                             channelMasks="AUDIO_CHANNEL_IN_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <!-- Output devices declaration, i.e. Sink DEVICE PORT -->
+                <devicePort tagName="Earpiece" type="AUDIO_DEVICE_OUT_EARPIECE" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker" type="AUDIO_DEVICE_OUT_SPEAKER" role="sink">
+                </devicePort>
+                <devicePort tagName="Speaker Safe" type="AUDIO_DEVICE_OUT_SPEAKER_SAFE" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="BT SCO Car Kit" type="AUDIO_DEVICE_OUT_BLUETOOTH_SCO_CARKIT" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Device Out" type="AUDIO_DEVICE_OUT_USB_DEVICE" role="sink">
+                </devicePort>
+                <devicePort tagName="USB Headset Out" type="AUDIO_DEVICE_OUT_USB_HEADSET" role="sink">
+                </devicePort>
+                <devicePort tagName="Telephony Tx" type="AUDIO_DEVICE_OUT_TELEPHONY_TX" role="sink">
+                </devicePort>
+                <!-- Input devices declaration, i.e. Source DEVICE PORT -->
+                <devicePort tagName="Built-In Mic" type="AUDIO_DEVICE_IN_BUILTIN_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="Built-In Back Mic" type="AUDIO_DEVICE_IN_BACK_MIC" role="source">
+                </devicePort>
+                <devicePort tagName="Wired Headset Mic" type="AUDIO_DEVICE_IN_WIRED_HEADSET" role="source">
+                </devicePort>
+                <devicePort tagName="BT SCO Headset Mic" type="AUDIO_DEVICE_IN_BLUETOOTH_SCO_HEADSET" role="source">
+                </devicePort>
+                <devicePort tagName="USB Device In" type="AUDIO_DEVICE_IN_USB_DEVICE" role="source">
+                </devicePort>
+                <devicePort tagName="USB Headset In" type="AUDIO_DEVICE_IN_USB_HEADSET" role="source">
+                </devicePort>
+                <!-- AUDIO_DEVICE_IN_VOICE_CALL and AUDIO_DEVICE_IN_TELEPHONY_RX are in the same value -->
+                <devicePort tagName="Voice Call And Telephony Rx" type="AUDIO_DEVICE_IN_VOICE_CALL" role="source">
+                </devicePort>
+                <devicePort tagName="Echo Ref In" type="AUDIO_DEVICE_IN_ECHO_REFERENCE" role="source">
+                </devicePort>
+            </devicePorts>
+            <!-- route declaration, i.e. list all available sources for a given sink -->
+            <routes>
+                <route type="mix" sink="Speaker"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,immersive_out"/>
+                <route type="mix" sink="Speaker Safe"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="Earpiece"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx"/>
+                <route type="mix" sink="USB Device Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="USB Headset Out"
+                       sources="primary output,deep buffer,haptic,raw,compressed_offload,mmap_no_irq_out,voip_rx,hifi_playback,immersive_out"/>
+                <route type="mix" sink="BT SCO"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Headset"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="BT SCO Car Kit"
+                       sources="primary output,deep buffer,haptic,compressed_offload,voip_rx"/>
+                <route type="mix" sink="Telephony Tx" sources="incall playback,voice call tx" />
+                <route type="mix" sink="primary input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="hotword input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="incall capture" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voice call rx" sources="Voice Call And Telephony Rx" />
+                <route type="mix" sink="voip_tx"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In,BT SCO Headset Mic"/>
+                <route type="mix" sink="fast input"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="mmap_no_irq_in"
+                       sources="Built-In Mic,Built-In Back Mic,USB Device In,USB Headset In"/>
+                <route type="mix" sink="hifi_input" sources="USB Device In,USB Headset In" />
+                <route type="mix" sink="echo_ref_input" sources="Echo Ref In"/>
+            </routes>
+        </module>
+        <!-- A2dp Audio HAL -->
+        <xi:include href="a2dp_audio_policy_configuration_7_0.xml"/>
+        <!-- Usb Audio HAL -->
+        <module name="usbv2" halVersion="2.0">
+            <mixPorts>
+                <mixPort name="usb_accessory output" role="source">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </mixPort>
+            </mixPorts>
+            <devicePorts>
+                <devicePort tagName="USB Host Out" type="AUDIO_DEVICE_OUT_USB_ACCESSORY" role="sink">
+                    <profile name="" format="AUDIO_FORMAT_PCM_16_BIT"
+                             samplingRates="44100" channelMasks="AUDIO_CHANNEL_OUT_STEREO"/>
+                </devicePort>
+            </devicePorts>
+            <routes>
+                <route type="mix" sink="USB Host Out"
+                       sources="usb_accessory output"/>
+            </routes>
+        </module>
+        <!-- Remote Submix Audio HAL -->
+        <xi:include href="r_submix_audio_policy_configuration.xml"/>
+    </modules>
+    <!-- End of Modules section -->
+    <!-- Volume section -->
+    <xi:include href="audio_policy_volumes.xml"/>
+    <xi:include href="default_volume_tables.xml"/>
+    <!-- End of Volume section -->
+</audioPolicyConfiguration>
diff --git a/audio/felix/config/mixer_paths.xml b/audio/felix/config/mixer_paths.xml
new file mode 100644
index 0000000..722f744
--- /dev/null
+++ b/audio/felix/config/mixer_paths.xml
@@ -0,0 +1,838 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2019, The Linux Foundation. All rights reserved.         -->
+<!--                                                                        -->
+<!-- Redistribution and use in source and binary forms, with or without     -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met:                                                                   -->
+<!--     * Redistributions of source code must retain the above copyright   -->
+<!--       notice, this list of conditions and the following disclaimer.    -->
+<!--     * Redistributions in binary form must reproduce the above          -->
+<!--       copyright notice, this list of conditions and the following      -->
+<!--       disclaimer in the documentation and/or other materials provided  -->
+<!--       with the distribution.                                           -->
+<!--     * Neither the name of The Linux Foundation nor the names of its    -->
+<!--       contributors may be used to endorse or promote products derived  -->
+<!--       from this software without specific prior written permission.    -->
+<!--                                                                        -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED           -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF   -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF   -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,  -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          -->
+<mixer>
+    <!-- Initial default value of ALSA command -->
+    <!-- PCM timeout -->
+    <ctl name="PCM Stream Wait Time in MSec" value="500"/>
+
+    <!-- TDM 0 setting -->
+    <ctl name="TDM_0_RX Chan" value="Four"/>
+    <ctl name="TDM_0_RX Format" value="S32_LE"/>
+    <ctl name="TDM_0_TX Chan" value="Four"/>
+    <ctl name="TDM_0_TX Format" value="S32_LE"/>
+
+    <!-- Haptic setting -->
+    <ctl name="Haptics Source" value="PCM"/>
+    <ctl name="HR Haptics Source" value="PCM"/>
+    <ctl name="HAPTIC_RX Format" value="S32_LE"/>
+    <ctl name="HAPTIC_RX SlotFmt" value="S32_LE"/>
+    <ctl name="HAPTIC_RX Chan" value="Four"/>
+    <ctl name="HAPTIC_RX nSlot" value="Four"/>
+    <ctl name="RX Slots" id="0" value="2"/>
+    <ctl name="RX Slots" id="1" value="3"/>
+    <ctl name="HR RX Slots" id="0" value="2"/>
+    <ctl name="HR RX Slots" id="1" value="3"/>
+
+    <!-- Cirrus Booster Amp TDM slot assignment-->
+    <!-- RX slot -->
+    <ctl name="ASPRX1 Slot Position" value="0"/>
+    <ctl name="ASPRX2 Slot Position" value="1"/>
+    <ctl name="R ASPRX1 Slot Position" value="1"/>
+    <ctl name="R ASPRX2 Slot Position" value="0"/>
+    <ctl name="E ASPRX1 Slot Position" value="0"/>
+    <ctl name="E ASPRX2 Slot Position" value="1"/>
+    <!-- TX slot -->
+    <ctl name="ASPTX1 Slot Position" value="0"/>
+    <ctl name="R ASPTX1 Slot Position" value="1"/>
+    <ctl name="E ASPTX1 Slot Position" value="4"/>
+    <ctl name="ASPTX2 Slot Position" value="2"/>
+    <ctl name="R ASPTX2 Slot Position" value="3"/>
+    <ctl name="E ASPTX2 Slot Position" value="5"/>
+    <ctl name="ASPTX3 Slot Position" value="6"/>
+    <ctl name="R ASPTX3 Slot Position" value="6"/>
+    <ctl name="E ASPTX3 Slot Position" value="6"/>
+    <ctl name="ASPTX4 Slot Position" value="7"/>
+    <ctl name="R ASPTX4 Slot Position" value="7"/>
+    <ctl name="E ASPTX4 Slot Position" value="7"/>
+
+    <!-- Cirrus Booster Amp DRE and VBST config-->
+    <ctl name="VBSTMON Output Switch" value="1"/>
+    <ctl name="R VBSTMON Output Switch" value="1"/>
+    <ctl name="E VBSTMON Output Switch" value="1"/>
+    <ctl name="DRE DRE Switch" value="1"/>
+    <ctl name="R DRE DRE Switch" value="1"/>
+    <ctl name="E DRE DRE Switch" value="1"/>
+
+    <!-- Cirrus Booster Amp Output Gain -->
+    <ctl name="AMP PCM Gain" value="17"/>
+    <ctl name="R AMP PCM Gain" value="17"/>
+    <ctl name="E AMP PCM Gain" value="0"/>
+    <ctl name="Digital PCM Volume" value="817"/>
+    <ctl name="R Digital PCM Volume" value="817"/>
+    <ctl name="E Digital PCM Volume" value="817"/>
+
+    <!-- Cirrus Booster Amp Power -->
+    <ctl name="Main AMP Enable Switch" value="0"/>
+    <ctl name="R Main AMP Enable Switch" value="0"/>
+    <ctl name="E Main AMP Enable Switch" value="0"/>
+
+    <!-- Cirrus Booster mode -->
+    <ctl name="PCM Source" value="DSP"/>
+    <ctl name="R PCM Source" value="DSP"/>
+    <ctl name="E PCM Source" value="ASP"/>
+    <ctl name="DSP1 Firmware" value="Protection"/>
+    <ctl name="R DSP1 Firmware" value="Protection"/>
+    <ctl name="E DSP1 Firmware" value="Protection"/>
+    <ctl name="DSP RX1 Source" value="ASPRX1"/>
+    <ctl name="DSP RX2 Source" value="ASPRX1"/>
+    <ctl name="R DSP RX1 Source" value="ASPRX1"/>
+    <ctl name="R DSP RX2 Source" value="ASPRX1"/>
+    <!--ctl name="E DSP RX1 Source" value="ASPRX1"/>
+    <ctl name="E DSP RX2 Source" value="ASPRX1"/-->
+
+    <!-- Cirrus ASP TX source -->
+    <ctl name="ASP TX1 Source" value="VMON" />
+    <ctl name="R ASP TX1 Source" value="VMON" />
+    <ctl name="E ASP TX1 Source" value="VMON" />
+    <ctl name="ASP TX2 Source" value="IMON" />
+    <ctl name="R ASP TX2 Source" value="IMON" />
+    <ctl name="E ASP TX2 Source" value="IMON" />
+    <ctl name="ASP TX3 Source" value="Zero" />
+    <ctl name="R ASP TX3 Source" value="Zero" />
+    <ctl name="E ASP TX3 Source" value="Zero" />
+    <ctl name="ASP TX4 Source" value="Zero" />
+    <ctl name="R ASP TX4 Source" value="Zero" />
+    <ctl name="E ASP TX4 Source" value="Zero" />
+
+
+    <!-- audio RX route initial/default value -->
+    <ctl name="TDM_0_RX Mixer EP1" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP2" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP3" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP4" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP5" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP6" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP7" value="0"/>
+    <ctl name="TDM_0_RX Mixer EP8" value="0"/>
+    <ctl name="TDM_0_RX Mixer NoHost1" value="0"/>
+    <ctl name="TDM_0_RX Mixer VOIP" value="0"/>
+    <ctl name="TDM_0_RX Mixer RAW" value="0"/>
+
+    <ctl name="TDM_1_RX Mixer EP1" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP2" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP3" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP4" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP5" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP6" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP7" value="0"/>
+    <ctl name="TDM_1_RX Mixer EP8" value="0"/>
+    <ctl name="TDM_1_RX Mixer NoHost1" value="0"/>
+
+    <ctl name="USB_RX Mixer EP1" value="0"/>
+    <ctl name="USB_RX Mixer EP2" value="0"/>
+    <ctl name="USB_RX Mixer EP3" value="0"/>
+    <ctl name="USB_RX Mixer EP4" value="0"/>
+    <ctl name="USB_RX Mixer EP5" value="0"/>
+    <ctl name="USB_RX Mixer EP6" value="0"/>
+    <ctl name="USB_RX Mixer EP7" value="0"/>
+    <ctl name="USB_RX Mixer NoHost1" value="0"/>
+    <ctl name="USB_RX Mixer VOIP" value="0"/>
+    <ctl name="USB_RX Mixer HIFI" value="0"/>
+    <ctl name="USB_RX Mixer RAW" value="0"/>
+
+    <ctl name="BT_RX Mixer EP1" value="0"/>
+    <ctl name="BT_RX Mixer EP2" value="0"/>
+    <ctl name="BT_RX Mixer EP3" value="0"/>
+    <ctl name="BT_RX Mixer EP4" value="0"/>
+    <ctl name="BT_RX Mixer EP5" value="0"/>
+    <ctl name="BT_RX Mixer EP6" value="0"/>
+    <ctl name="BT_RX Mixer EP7" value="0"/>
+    <ctl name="BT_RX Mixer NoHost1" value="0"/>
+    <ctl name="BT_RX Mixer VOIP" value="0"/>
+
+    <ctl name="INCALL_RX Mixer EP1" value="0"/>
+    <ctl name="INCALL_RX Mixer EP2" value="0"/>
+    <ctl name="INCALL_RX Mixer EP3" value="0"/>
+    <ctl name="INCALL_RX Mixer EP4" value="0"/>
+    <ctl name="INCALL_RX Mixer EP5" value="0"/>
+    <ctl name="INCALL_RX Mixer EP6" value="0"/>
+    <ctl name="INCALL_RX Mixer EP7" value="0"/>
+    <ctl name="INCALL_RX Mixer NoHost1" value="0"/>
+
+    <ctl name="SINK_IDS" id="0" value="-1"/>
+    <ctl name="SINK_IDS" id="1" value="-1"/>
+
+    <!-- audio TX route initial/default value -->
+    <ctl name="EP1 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="EP2 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="EP3 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="EP4 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="EP5 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="EP6 TX Mixer TDM_0_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer TDM_0_TX" value="0"/>
+
+    <ctl name="EP1 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="EP2 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="EP3 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="EP4 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="EP5 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="EP6 TX Mixer TDM_1_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer TDM_1_TX" value="0"/>
+
+    <ctl name="EP1 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="EP2 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="EP3 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="EP4 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="EP5 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="EP6 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer INTERNAL_MIC_TX" value="0"/>
+    <ctl name="VOIP TX Mixer INTERNAL_MIC_TX" value="0"/>
+
+    <ctl name="EP1 TX Mixer BT_TX" value="0"/>
+    <ctl name="EP2 TX Mixer BT_TX" value="0"/>
+    <ctl name="EP3 TX Mixer BT_TX" value="0"/>
+    <ctl name="EP4 TX Mixer BT_TX" value="0"/>
+    <ctl name="EP5 TX Mixer BT_TX" value="0"/>
+    <ctl name="EP6 TX Mixer BT_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer BT_TX" value="0"/>
+    <ctl name="VOIP TX Mixer BT_TX" value="0"/>
+
+    <ctl name="EP1 TX Mixer USB_TX" value="0"/>
+    <ctl name="EP2 TX Mixer USB_TX" value="0"/>
+    <ctl name="EP3 TX Mixer USB_TX" value="0"/>
+    <ctl name="EP4 TX Mixer USB_TX" value="0"/>
+    <ctl name="EP5 TX Mixer USB_TX" value="0"/>
+    <ctl name="EP6 TX Mixer USB_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer USB_TX" value="0"/>
+    <ctl name="VOIP TX Mixer USB_TX" value="0"/>
+
+    <ctl name="EP1 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="EP2 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="EP3 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="EP4 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="EP5 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="EP6 TX Mixer INCALL_TX" value="0"/>
+    <ctl name="NoHost1 TX Mixer INCALL_TX" value="0"/>
+
+    <ctl name="EP4 TX Mixer I2S_2_TX" value="0"/>
+
+    <!-- AoC Mic setting -->
+    <ctl name="MIC DC Blocker" value="1" />
+    <ctl name="MIC HW Gain At High Power Mode (cB)" value="0" />
+    <ctl name="MIC Record Soft Gain (dB)" value="-40"/>
+
+    <!-- USB setting v2 -->
+    <ctl name="USB Bus ID v2" value="2"/>
+    <ctl name="USB Dev ID v2" value="2"/>
+    <ctl name="USB Playback EP ID v2" value="1"/>
+    <ctl name="USB Playback FORMAT v2" value="0"/>
+    <ctl name="USB Playback SR v2" value="48000"/>
+    <ctl name="USB Playback CH v2" value="2"/>
+    <ctl name="USB Playback BW v2" value="24"/>
+    <ctl name="USB Capture EP ID v2" value="1"/>
+    <ctl name="USB Capture FORMAT v2" value="0"/>
+    <ctl name="USB Capture SR v2" value="48000"/>
+    <ctl name="USB Capture CH v2" value="1"/>
+    <ctl name="USB Capture BW v2" value="16"/>
+
+    <ctl name="AoC Modem Downlink ASRC Mode" value="ASP_ON"/>
+    <ctl name="Voice Call Mic Source" value="Builtin_MIC"/>
+    <ctl name="Mic Spatial Module Enable" value="0"/>
+    <ctl name="Audio Capture Eraser Enable" value="0"/>
+
+    <!-- audio PDM mic default state -->
+    <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="-1"/>
+    <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1"/>
+    <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
+    <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+    <ctl name="Audio Capture Mic Source" value="Builtin_MIC"/>
+
+    <!-- sidetone controls -->
+    <ctl name="Sidetone Enable" value="0"/>
+    <ctl name="Sidetone Volume" value="-96"/>
+    <ctl name="Sidetone Selected Mic" value="0"/>
+    <ctl name="Sidetone EQ Stage Number" value="1"/>
+    <!-- IEEE 754, value is in float -->
+    <ctl name="Sidetone Biquad0" id="0" value="0"/>
+    <ctl name="Sidetone Biquad0" id="1" value="0"/>
+    <ctl name="Sidetone Biquad0" id="2" value="0"/>
+    <ctl name="Sidetone Biquad0" id="3" value="0"/>
+    <ctl name="Sidetone Biquad0" id="4" value="0"/>
+    <ctl name="Sidetone Biquad0" id="5" value="0"/>
+    <ctl name="Sidetone Biquad1" id="0" value="0"/>
+    <ctl name="Sidetone Biquad1" id="1" value="0"/>
+    <ctl name="Sidetone Biquad1" id="2" value="0"/>
+    <ctl name="Sidetone Biquad1" id="3" value="0"/>
+    <ctl name="Sidetone Biquad1" id="4" value="0"/>
+    <ctl name="Sidetone Biquad1" id="5" value="0"/>
+    <ctl name="Sidetone Biquad2" id="0" value="0"/>
+    <ctl name="Sidetone Biquad2" id="1" value="0"/>
+    <ctl name="Sidetone Biquad2" id="2" value="0"/>
+    <ctl name="Sidetone Biquad2" id="3" value="0"/>
+    <ctl name="Sidetone Biquad2" id="4" value="0"/>
+    <ctl name="Sidetone Biquad2" id="5" value="0"/>
+    <ctl name="Sidetone Biquad3" id="0" value="0"/>
+    <ctl name="Sidetone Biquad3" id="1" value="0"/>
+    <ctl name="Sidetone Biquad3" id="2" value="0"/>
+    <ctl name="Sidetone Biquad3" id="3" value="0"/>
+    <ctl name="Sidetone Biquad3" id="4" value="0"/>
+    <ctl name="Sidetone Biquad3" id="5" value="0"/>
+    <ctl name="Sidetone Biquad4" id="0" value="0"/>
+    <ctl name="Sidetone Biquad4" id="1" value="0"/>
+    <ctl name="Sidetone Biquad4" id="2" value="0"/>
+    <ctl name="Sidetone Biquad4" id="3" value="0"/>
+    <ctl name="Sidetone Biquad4" id="4" value="0"/>
+    <ctl name="Sidetone Biquad4" id="5" value="0"/>
+
+    <ctl name="Incall Capture Stream0" value="Off"/>
+    <ctl name="Incall Capture Stream1" value="Off"/>
+    <ctl name="Incall Capture Stream2" value="Off"/>
+
+    <!-- These two controls control the muting function of mics and sinks during the voice call. -->
+    <!-- They would be enabled by HAL. -->
+    <ctl name="Incall Sink Mute" value="0"/>
+    <ctl name="Incall Mic Mute" value="0"/>
+
+    <!-- Decoder Reference Enable is controlled in aoc_control -->
+    <ctl name="Decoder Reference Enable" value="0"/>
+    <ctl name="LVM Enable" value="0"/>
+
+    <!-- sidetone dynamic control -->
+    <path name="sidetone-for handset">
+        <!-- 1065353216 = 0x3f800000 = 1.0 -->
+        <ctl name="Sidetone Biquad0" id="0" value="1065353216"/>
+        <ctl name="Sidetone Biquad0" id="1" value="1065353216"/>
+        <ctl name="Sidetone Biquad0" id="2" value="0"/>
+        <ctl name="Sidetone Biquad0" id="3" value="0"/>
+        <ctl name="Sidetone Biquad0" id="4" value="0"/>
+        <ctl name="Sidetone Biquad0" id="5" value="0"/>
+        <ctl name="Sidetone Biquad1" id="0" value="1065353216"/>
+        <ctl name="Sidetone Biquad1" id="1" value="1065353216"/>
+        <ctl name="Sidetone Biquad1" id="2" value="0"/>
+        <ctl name="Sidetone Biquad1" id="3" value="0"/>
+        <ctl name="Sidetone Biquad1" id="4" value="0"/>
+        <ctl name="Sidetone Biquad1" id="5" value="0"/>
+        <ctl name="Sidetone Biquad2" id="0" value="1065353216"/>
+        <ctl name="Sidetone Biquad2" id="1" value="1065353216"/>
+        <ctl name="Sidetone Biquad2" id="2" value="0"/>
+        <ctl name="Sidetone Biquad2" id="3" value="0"/>
+        <ctl name="Sidetone Biquad2" id="4" value="0"/>
+        <ctl name="Sidetone Biquad2" id="5" value="0"/>
+        <ctl name="Sidetone Biquad3" id="0" value="1065353216"/>
+        <ctl name="Sidetone Biquad3" id="1" value="1065353216"/>
+        <ctl name="Sidetone Biquad3" id="2" value="0"/>
+        <ctl name="Sidetone Biquad3" id="3" value="0"/>
+        <ctl name="Sidetone Biquad3" id="4" value="0"/>
+        <ctl name="Sidetone Biquad3" id="5" value="0"/>
+        <ctl name="Sidetone Biquad4" id="0" value="1065353216"/>
+        <ctl name="Sidetone Biquad4" id="1" value="1065353216"/>
+        <ctl name="Sidetone Biquad4" id="2" value="0"/>
+        <ctl name="Sidetone Biquad4" id="3" value="0"/>
+        <ctl name="Sidetone Biquad4" id="4" value="0"/>
+        <ctl name="Sidetone Biquad4" id="5" value="0"/>
+        <ctl name="Sidetone EQ Stage Number" value="5"/>
+        <ctl name="Sidetone Volume" value="-90"/>
+        <ctl name="Sidetone Enable" value="1"/>
+    </path>
+
+    <!-- audio playback dynamic route -->
+    <path name="deep-buffer-playbackP">
+        <ctl name="TDM_0_RX Mixer EP6" value="1"/>
+    </path>
+
+    <path name="deep-buffer-playbackP hac-handset">
+    </path>
+
+    <path name="deep-buffer-playbackP bt">
+        <ctl name="BT_RX Mixer EP6" value="1"/>
+    </path>
+
+    <path name="deep-buffer-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer EP6" value="1"/>
+    </path>
+
+    <path name="deep-buffer-playbackP hearing-aid">
+    </path>
+
+    <path name="low-latency-playbackP">
+        <ctl name="TDM_0_RX Mixer EP2" value="1"/>
+    </path>
+
+    <path name="low-latency-playbackP hac-handset">
+    </path>
+
+    <path name="low-latency-playbackP bt">
+        <ctl name="BT_RX Mixer EP2" value="1"/>
+    </path>
+
+    <path name="low-latency-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer EP2" value="1"/>
+    </path>
+
+    <path name="low-latency-playbackP hearing-aid">
+    </path>
+
+    <path name="raw-playbackP">
+        <ctl name="TDM_0_RX Mixer RAW" value="1"/>
+    </path>
+
+    <path name="raw-playbackP hac-handset">
+    </path>
+
+    <path name="raw-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer RAW" value="1"/>
+    </path>
+
+    <path name="raw-playbackP hearing-aid">
+    </path>
+
+    <path name="mmap-playbackP">
+        <ctl name="TDM_0_RX Mixer EP1" value="1"/>
+    </path>
+
+    <path name="mmap-playbackP hac-handset">
+    </path>
+
+    <path name="mmap-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer EP1" value="1"/>
+    </path>
+
+    <path name="mmap-playbackP hearing-aid">
+    </path>
+
+    <path name="compress-offload-playback">
+        <ctl name="LVM Enable" value="1" />
+    </path>
+
+    <path name="compress-offload-playbackP">
+        <path name="compress-offload-playback" />
+        <ctl name="TDM_0_RX Mixer EP7" value="1"/>
+    </path>
+
+    <path name="compress-offload-playbackP hac-handset">
+        <path name="compress-offload-playback" />
+    </path>
+
+    <path name="compress-offload-playbackP bt">
+        <path name="compress-offload-playback" />
+        <ctl name="BT_RX Mixer EP7" value="1"/>
+    </path>
+
+    <path name="compress-offload-playbackP usb-headphone">
+        <path name="compress-offload-playback" />
+        <ctl name="USB_RX Mixer EP7" value="1"/>
+    </path>
+
+    <path name="compress-offload-playbackP hearing-aid">
+        <path name="compress-offload-playback" />
+    </path>
+
+    <path name="immersive-playbackP">
+        <ctl name="TDM_0_RX Mixer EP4" value="1"/>
+    </path>
+
+    <path name="immersive-playbackP bt">
+        <ctl name="BT_RX Mixer EP4" value="1"/>
+    </path>
+
+    <path name="immersive-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer EP4" value="1"/>
+    </path>
+
+    <path name="voip-playbackP">
+        <ctl name="TDM_0_RX Mixer VOIP" value="1"/>
+    </path>
+
+    <path name="voip-playbackP hac-handset">
+    </path>
+
+    <path name="voip-playbackP bt">
+        <ctl name="BT_RX Mixer VOIP" value="1"/>
+    </path>
+
+    <path name="voip-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer VOIP" value="1"/>
+    </path>
+
+    <path name="voip-playbackP hearing-aid">
+    </path>
+
+    <path name="haptic-audioP">
+        <ctl name="TDM_0_RX Mixer EP3" value="1"/>
+        <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+    </path>
+
+    <path name="haptic-audioP hac-handset">
+    </path>
+
+    <path name="haptic-audioP bt">
+        <ctl name="BT_RX Mixer EP3" value="1"/>
+        <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+    </path>
+
+    <path name="haptic-audioP usb-headphone">
+        <ctl name="USB_RX Mixer EP3" value="1"/>
+        <ctl name="TDM_0_RX Mixer EP8" value="1"/>
+    </path>
+
+    <path name="hifi-playbackP">
+    </path>
+
+    <path name="hifi-playbackP usb-headphone">
+        <ctl name="USB_RX Mixer HIFI" value="1"/>
+    </path>
+
+    <path name="hifi-recordC">
+    </path>
+
+    <path name="hifi-recordC usb-headset-mic">
+    </path>
+
+    <!-- audio capture dynamic route -->
+    <path name="audio-recordC">
+        <ctl name="EP1 TX Mixer INTERNAL_MIC_TX" value="1"/>
+    </path>
+
+    <path name="audio-recordC usb-headset-mic">
+        <ctl name="EP1 TX Mixer USB_TX" value="1"/>
+    </path>
+
+    <path name="audio-recordC bt-mic">
+        <ctl name="EP1 TX Mixer BT_TX" value="1"/>
+    </path>
+
+    <path name="voip-recordC">
+        <ctl name="VOIP TX Mixer INTERNAL_MIC_TX" value="1"/>
+    </path>
+
+    <path name="voip-recordC usb-headset-mic">
+        <ctl name="VOIP TX Mixer USB_TX" value="1"/>
+    </path>
+
+    <path name="voip-recordC bt-mic">
+        <ctl name="VOIP TX Mixer BT_TX" value="1"/>
+    </path>
+
+    <!-- voice-call dynamic route -->
+    <path name="voice-callP">
+        <ctl name="TDM_0_RX Mixer EP5" value="1"/>
+    </path>
+
+    <path name="voice-callP bt">
+        <ctl name="BT_RX Mixer EP5" value="1"/>
+    </path>
+
+    <path name="voice-callP usb-headphone">
+        <ctl name="USB_RX Mixer EP5" value="1"/>
+    </path>
+
+    <path name="voice-callP hearing-aid">
+        <ctl name="INCALL_RX Mixer EP5" value="1"/>
+    </path>
+
+    <path name="voice-callP call-screen">
+        <ctl name="INCALL_RX Mixer EP5" value="1"/>
+    </path>
+
+    <path name="voice-callC">
+        <ctl name="EP4 TX Mixer INTERNAL_MIC_TX" value="1"/>
+    </path>
+
+    <path name="voice-callC usb-headset-mic">
+        <ctl name="EP4 TX Mixer USB_TX" value="1"/>
+    </path>
+
+    <path name="voice-callC bt-mic">
+        <ctl name="EP4 TX Mixer BT_TX" value="1"/>
+    </path>
+
+    <path name="voice-callC hearing-aid">
+        <ctl name="EP4 TX Mixer INCALL_TX" value="1"/>
+    </path>
+
+    <path name="voice-callC call-screen">
+        <ctl name="EP4 TX Mixer INCALL_TX" value="1"/>
+    </path>
+
+    <path name="hostless-ulC spk-vi">
+        <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1"/>
+    </path>
+
+    <path name="telephony-rx-captureC">
+        <ctl name="Incall Capture Stream0" value="DL"/>
+    </path>
+
+    <path name="incall-capture1C uplink">
+        <ctl name="Incall Capture Stream1" value="UL"/>
+    </path>
+
+    <path name="incall-capture1C downlink">
+        <ctl name="Incall Capture Stream1" value="DL"/>
+    </path>
+
+    <path name="incall-capture1C call">
+        <ctl name="Incall Capture Stream1" value="UL_DL"/>
+    </path>
+
+    <path name="incall-capture2C uplink">
+        <ctl name="Incall Capture Stream2" value="UL"/>
+    </path>
+
+    <path name="incall-capture2C downlink">
+        <ctl name="Incall Capture Stream2" value="DL"/>
+    </path>
+
+    <path name="incall-capture2C call">
+        <ctl name="Incall Capture Stream2" value="UL_DL"/>
+    </path>
+
+    <path name="low-latency-recordC">
+        <ctl name="EP3 TX Mixer INTERNAL_MIC_TX" value="1"/>
+    </path>
+
+    <path name="low-latency-recordC usb-headset-mic">
+        <ctl name="EP3 TX Mixer USB_TX" value="1"/>
+    </path>
+
+    <path name="mmap-recordC">
+        <ctl name="EP2 TX Mixer INTERNAL_MIC_TX" value="1"/>
+    </path>
+
+    <path name="mmap-recordC usb-headset-mic">
+        <ctl name="EP2 TX Mixer USB_TX" value="1"/>
+    </path>
+
+    <!-- codec setting -->>
+    <!-- Rx device -->
+    <path name="handset">
+        <ctl name="E PCM Source" value="ASP"/>
+        <ctl name="E AMP PCM Gain" value="6"/>
+        <ctl name="ASPTX1 Slot Position" value="4"/>
+        <ctl name="E ASPTX1 Slot Position" value="0"/>
+        <ctl name="ASPTX2 Slot Position" value="5"/>
+        <ctl name="E ASPTX2 Slot Position" value="2"/>
+        <ctl name="E Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <path name="voice-handset">
+        <ctl name="E PCM Source" value="ASP"/>
+        <ctl name="E AMP PCM Gain" value="6"/>
+        <ctl name="ASPTX1 Slot Position" value="4"/>
+        <ctl name="E ASPTX1 Slot Position" value="0"/>
+        <ctl name="ASPTX2 Slot Position" value="5"/>
+        <ctl name="E ASPTX2 Slot Position" value="2"/>
+        <ctl name="E Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <path name="voice-hac">
+        <path name="voice-handset"/>
+        <ctl name="E AMP PCM Gain" value="8"/>
+    </path>
+
+    <path name="voice-hac-handset">
+    </path>
+
+    <path name="speaker">
+        <ctl name="Main AMP Enable Switch" value="1"/>
+        <ctl name="R Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <path name="voice-speaker">
+        <ctl name="ASP TX1 Source" value="VMON" />
+        <ctl name="R ASP TX1 Source" value="Zero" />
+        <ctl name="ASPTX1 Slot Position" value="0"/>
+        <ctl name="R ASPTX1 Slot Position" value="1"/>
+        <ctl name="ASPRX1 Slot Position" value="0"/>
+        <ctl name="R ASPRX1 Slot Position" value="1"/>
+        <ctl name="Main AMP Enable Switch" value="1"/>
+        <ctl name="R Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <path name="speaker-safe">
+        <ctl name="R Main AMP Enable Switch" value="1"/>
+    </path>
+
+    <!-- Tx device -->
+    <path name="handset-mic">
+        <ctl name="Mic Spatial Module Enable" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="handset-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="22"/>
+    </path>
+
+    <path name="voice-handset-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+        <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
+    </path>
+
+    <path name="voice-handset-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="speaker-mic">
+        <ctl name="Mic Spatial Module Enable" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="speaker-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="voice-speaker-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+        <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
+    </path>
+
+    <path name="voice-speaker-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="camcorder-mic">
+        <ctl name="Mic Spatial Module Enable" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="camcorder-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="voice-recog-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="voice-recog-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="22"/>
+    </path>
+
+    <path name="voice-recog-aec-mic">
+        <ctl name="Audio Capture Eraser Enable" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+        <ctl name="Audio Capture Mic Source" value="ERASER"/>
+    </path>
+
+    <path name="voice-recog-aec-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="unprocessed-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="unprocessed-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="5"/>
+    </path>
+
+    <path name="unprocessed-dual-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="unprocessed-dual-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="5"/>
+    </path>
+
+    <path name="unprocessed-triple-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="MIC DC Blocker" value="1"/>
+    </path>
+
+    <path name="unprocessed-triple-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="5"/>
+    </path>
+
+    <path name="bt-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="Audio Capture Mic Source" value="BT_MIC"/>
+        <ctl name="Voice Call Mic Source" value="BT_MIC"/>
+    </path>
+
+    <path name="bt-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <path name="usb-headset-mic">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
+        <ctl name="Audio Capture Mic Source" value="USB_MIC"/>
+        <ctl name="Voice Call Mic Source" value="USB_MIC"/>
+    </path>
+
+    <path name="usb-headset-mic-post">
+        <ctl name="MIC Record Soft Gain (dB)" value="0"/>
+    </path>
+
+    <!-- cs35l41 specific path to load firmware in cs35l41.c -->
+    <path name="cs35l41-load-protection-firmware-start">
+        <!-- Enable it after get the protection firmware -->
+        <ctl name="DSP Booted" value="0" />
+        <ctl name="R DSP Booted" value="0" />
+        <ctl name="DSP1 Preload Switch" value="0" />
+        <ctl name="R DSP1 Preload Switch" value="0" />
+    </path>
+
+    <path name="cs35l41-load-protection-firmware-end">
+        <!-- Enable it after get the protection firmware -->
+        <ctl name="DSP1 Preload Switch" value="1" />
+        <ctl name="R DSP1 Preload Switch" value="1" />
+    </path>
+    <!-- cs35l41 specific path to load firmware in cs35l41.c end-->
+</mixer>
diff --git a/audio/felix/config/mixer_paths_factory.xml b/audio/felix/config/mixer_paths_factory.xml
new file mode 100644
index 0000000..db90b41
--- /dev/null
+++ b/audio/felix/config/mixer_paths_factory.xml
@@ -0,0 +1,395 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<mixer>
+    <ctl name="TDM_0_RX Mixer EP3" value="0" />
+    <ctl name="TDM_0_RX Mixer EP6" value="0" />
+    <ctl name="I2S_0_RX Mixer EP3" value="0" />
+    <ctl name="Main AMP Enable Switch" value="0" />
+    <ctl name="R Main AMP Enable Switch" value="0" />
+    <ctl name="E Main AMP Enable Switch" value="0" />
+    <ctl name="MIC HW Gain At Lower Power Mode (cB)" value="-160" />
+    <ctl name="MIC HW Gain At High Power Mode (cB)" value="0" />
+
+    <ctl name="EP1 TX Mixer TDM_0_TX" value="0" />
+    <ctl name="DEFAULT_MIC_ID" value="0" />
+    <ctl name="MIC0" value="0" />
+    <ctl name="MIC1" value="0" />
+    <ctl name="MIC2" value="0" />
+    <ctl name="MIC3" value="0" />
+    <ctl name="AoC Speaker Mixer ASP Mode" value="ASP_ON" />
+
+    <path name="mfg-playback">
+    </path>
+
+    <path name="deep-buffer-playback speaker">
+        <ctl name="AoC Speaker Mixer ASP Mode" value="ASP_BYPASS" />
+        <ctl name="TDM_0_RX Mixer EP6" value="1" />
+        <path name="mfg-playback" />
+    </path>
+
+    <path name="deep-buffer-playback headphones">
+        <ctl name="I2S_0_RX Mixer EP6" value="1" />
+        <path name="mfg-playback" />
+    </path>
+
+    <path name="mfg-record">
+        <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="mic1-status">
+        <ctl name="MIC0" value="1" />
+    </path>
+
+    <path name="mic2-status">
+        <ctl name="MIC1" value="1" />
+    </path>
+
+    <path name="mic3-status">
+        <ctl name="MIC2" value="1" />
+    </path>
+
+    <path name="mic4-status">
+        <ctl name="MIC3" value="1" />
+    </path>
+
+    <path name="mic1-gain">
+        <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+        <ctl name="MIC HW Gain At High Power Mode (cB)" />
+    </path>
+
+    <path name="mic2-gain">
+        <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+        <ctl name="MIC HW Gain At High Power Mode (cB)" />
+    </path>
+
+    <path name="mic3-gain">
+        <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+        <ctl name="MIC HW Gain At High Power Mode (cB)" />
+    </path>
+
+    <path name="mic4-gain">
+        <ctl name="MIC HW Gain At Lower Power Mode (cB)" />
+        <ctl name="MIC HW Gain At High Power Mode (cB)" />
+    </path>
+
+    <path name="mic1-sw-gain">
+        <ctl name="MIC Record Soft Gain (dB)" />
+    </path>
+
+    <path name="mic2-sw-gain">
+        <ctl name="MIC Record Soft Gain (dB)" />
+    </path>
+
+    <path name="mic3-sw-gain">
+        <ctl name="MIC Record Soft Gain (dB)" />
+    </path>
+
+    <path name="mic4-sw-gain">
+        <ctl name="MIC Record Soft Gain (dB)" />
+    </path>
+
+    <path name="usb-capture-gain">
+        <ctl name="Headset Capture Volume" />
+    </path>
+
+    <path name="mic1-only">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+        <ctl name="MIC0" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="mic2-only">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+        <ctl name="MIC1" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="mic3-only">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="2" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+        <ctl name="MIC2" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="mic4-only">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="3" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
+        <ctl name="MIC3" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="mic-all">
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="3" />
+        <ctl name="MIC0" value="1" />
+        <ctl name="MIC1" value="1" />
+        <ctl name="MIC2" value="1" />
+        <ctl name="MIC3" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="amp_iv-only">
+        <ctl name="E ASPTX1 Slot Position" value="3" />
+        <ctl name="E ASPTX2 Slot Position" value="5" />
+        <ctl name="E ASPTX3 Slot Position" value="6" />
+        <ctl name="E ASPTX4 Slot Position" value="7" />
+        <ctl name="R ASPTX1 Slot Position" value="2" />
+        <ctl name="R ASPTX2 Slot Position" value="0" />
+        <ctl name="R ASPTX3 Slot Position" value="6" />
+        <ctl name="R ASPTX4 Slot Position" value="7" />
+        <ctl name="ASPTX1 Slot Position" value="1" />
+        <ctl name="ASPTX2 Slot Position" value="4" />
+        <ctl name="ASPTX3 Slot Position" value="5" />
+        <ctl name="ASPTX4 Slot Position" value="6" />
+        <ctl name="E ASP TX1 Source" value="ASPRX1" />
+        <ctl name="E ASP TX2 Source" value="Zero" />
+        <ctl name="E ASP TX3 Source" value="Zero" />
+        <ctl name="E ASP TX4 Source" value="Zero" />
+        <ctl name="R ASP TX1 Source" value="VMON" />
+        <ctl name="R ASP TX2 Source" value="ASPRX1" />
+        <ctl name="R ASP TX3 Source" value="Zero" />
+        <ctl name="R ASP TX4 Source" value="Zero" />
+        <ctl name="ASP TX1 Source" value="ASPRX1" />
+        <ctl name="ASP TX2 Source" value="Zero" />
+        <ctl name="ASP TX3 Source" value="Zero" />
+        <ctl name="ASP TX4 Source" value="Zero" />
+        <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="amp_iv1-only">
+        <ctl name="E ASPTX1 Slot Position" value="4" />
+        <ctl name="E ASPTX2 Slot Position" value="5" />
+        <ctl name="E ASPTX3 Slot Position" value="6" />
+        <ctl name="E ASPTX4 Slot Position" value="7" />
+        <ctl name="R ASPTX1 Slot Position" value="4" />
+        <ctl name="R ASPTX2 Slot Position" value="5" />
+        <ctl name="R ASPTX3 Slot Position" value="6" />
+        <ctl name="R ASPTX4 Slot Position" value="7" />
+        <ctl name="ASPTX1 Slot Position" value="0" />
+        <ctl name="ASPTX2 Slot Position" value="1" />
+        <ctl name="ASPTX3 Slot Position" value="2" />
+        <ctl name="ASPTX4 Slot Position" value="3" />
+        <ctl name="E ASP TX1 Source" value="Zero" />
+        <ctl name="E ASP TX2 Source" value="Zero" />
+        <ctl name="E ASP TX3 Source" value="Zero" />
+        <ctl name="E ASP TX4 Source" value="Zero" />
+        <ctl name="R ASP TX1 Source" value="Zero" />
+        <ctl name="R ASP TX2 Source" value="Zero" />
+        <ctl name="R ASP TX3 Source" value="Zero" />
+        <ctl name="R ASP TX4 Source" value="Zero" />
+        <ctl name="ASP TX1 Source" value="VMON" />
+        <ctl name="ASP TX2 Source" value="IMON" />
+        <ctl name="ASP TX3 Source" value="VPMON" />
+        <ctl name="ASP TX4 Source" value="ASPRX1" />
+        <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="amp_iv2-only">
+        <ctl name="E ASPTX1 Slot Position" value="4" />
+        <ctl name="E ASPTX2 Slot Position" value="5" />
+        <ctl name="E ASPTX3 Slot Position" value="6" />
+        <ctl name="E ASPTX4 Slot Position" value="7" />
+        <ctl name="R ASPTX1 Slot Position" value="0" />
+        <ctl name="R ASPTX2 Slot Position" value="1" />
+        <ctl name="R ASPTX3 Slot Position" value="2" />
+        <ctl name="R ASPTX4 Slot Position" value="3" />
+        <ctl name="ASPTX1 Slot Position" value="4" />
+        <ctl name="ASPTX2 Slot Position" value="5" />
+        <ctl name="ASPTX3 Slot Position" value="6" />
+        <ctl name="ASPTX4 Slot Position" value="7" />
+        <ctl name="E ASP TX1 Source" value="Zero" />
+        <ctl name="E ASP TX2 Source" value="Zero" />
+        <ctl name="E ASP TX3 Source" value="Zero" />
+        <ctl name="E ASP TX4 Source" value="Zero" />
+        <ctl name="R ASP TX1 Source" value="VMON" />
+        <ctl name="R ASP TX2 Source" value="IMON" />
+        <ctl name="R ASP TX3 Source" value="VPMON" />
+        <ctl name="R ASP TX4 Source" value="ASPRX1" />
+        <ctl name="ASP TX1 Source" value="Zero" />
+        <ctl name="ASP TX2 Source" value="Zero" />
+        <ctl name="ASP TX3 Source" value="Zero" />
+        <ctl name="ASP TX4 Source" value="Zero" />
+        <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="amp_iv3-only">
+        <ctl name="E ASPTX1 Slot Position" value="0" />
+        <ctl name="E ASPTX2 Slot Position" value="1" />
+        <ctl name="E ASPTX3 Slot Position" value="2" />
+        <ctl name="E ASPTX4 Slot Position" value="3" />
+        <ctl name="R ASPTX1 Slot Position" value="4" />
+        <ctl name="R ASPTX2 Slot Position" value="5" />
+        <ctl name="R ASPTX3 Slot Position" value="6" />
+        <ctl name="R ASPTX4 Slot Position" value="7" />
+        <ctl name="ASPTX1 Slot Position" value="4" />
+        <ctl name="ASPTX2 Slot Position" value="5" />
+        <ctl name="ASPTX3 Slot Position" value="6" />
+        <ctl name="ASPTX4 Slot Position" value="7" />
+        <ctl name="E ASP TX1 Source" value="VMON" />
+        <ctl name="E ASP TX2 Source" value="IMON" />
+        <ctl name="E ASP TX3 Source" value="VPMON" />
+        <ctl name="E ASP TX4 Source" value="ASPRX1" />
+        <ctl name="R ASP TX1 Source" value="Zero" />
+        <ctl name="R ASP TX2 Source" value="Zero" />
+        <ctl name="R ASP TX3 Source" value="Zero" />
+        <ctl name="R ASP TX4 Source" value="Zero" />
+        <ctl name="ASP TX1 Source" value="Zero" />
+        <ctl name="ASP TX2 Source" value="Zero" />
+        <ctl name="ASP TX3 Source" value="Zero" />
+        <ctl name="ASP TX4 Source" value="Zero" />
+        <ctl name="NoHost1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="speaker1-status">
+        <ctl name="Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="speaker2-status">
+        <ctl name="R Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="speaker3-status">
+        <ctl name="E Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="speaker1-gain">
+        <ctl name="AMP PCM Gain" />
+    </path>
+
+    <path name="speaker2-gain">
+        <ctl name="R AMP PCM Gain" />
+    </path>
+
+    <path name="speaker3-gain">
+        <ctl name="E AMP PCM Gain" />
+    </path>
+
+    <path name="usb-playback-gain">
+        <ctl name="Headset Playback Volume" />
+    </path>
+
+    <path name="mfg-playback speaker">
+        <ctl name="AoC Speaker Mixer ASP Mode" value="ASP_BYPASS" />
+        <ctl name="TDM_0_RX Mixer EP3" value="1" />
+        <ctl name="ASPRX1 Slot Position" value="0" />
+        <ctl name="R ASPRX1 Slot Position" value="1" />
+        <ctl name="SINK_IDS" id="0" value="0" />
+        <ctl name="SINK_IDS" id="1" value="-1" />
+    </path>
+
+    <path name="mfg-playback headphones">
+        <ctl name="I2S_0_RX Chan" value="Two" />
+        <ctl name="I2S_0_RX Format" value="S32_LE" />
+        <ctl name="I2S_0_RX Mixer EP3" value="1" />
+        <ctl name="SINK_IDS" id="0" value="1" />
+        <ctl name="SINK_IDS" id="1" value="-1" />
+    </path>
+
+    <path name="mfg-playback usb-headphones">
+        <ctl name="USB Dev ID v2" value="2" />
+        <ctl name="USB Playback EP ID v2" value="1" />
+        <ctl name="USB Playback FORMAT v2" value="6" />
+        <ctl name="USB Playback SR v2" value="48000" />
+        <ctl name="USB Playback CH v2" value="2" />
+        <ctl name="USB Playback BW v2" value="16" />
+        <ctl name="USB Config To AoC v2" value="1" />
+        <ctl name="USB_RX Mixer EP3" value="1" />
+    </path>
+
+    <path name="speaker1-only">
+        <ctl name="Main AMP Enable Switch" value="1" />
+        <path name="mfg-playback speaker" />
+        <ctl name="AMP PCM Gain" value="17" />
+        <ctl name="PCM Source" value="ASP" />
+    </path>
+
+    <path name="speaker2-only">
+        <ctl name="R Main AMP Enable Switch" value="1" />
+        <path name="mfg-playback speaker" />
+        <ctl name="R AMP PCM Gain" value="17" />
+        <ctl name="R PCM Source" value="ASP" />
+    </path>
+
+    <path name="speaker3-only">
+        <ctl name="E Main AMP Enable Switch" value="1" />
+        <path name="mfg-playback speaker" />
+        <ctl name="E PCM Source" value="ASP" />
+    </path>
+
+    <path name="headphones">
+        <ctl name="DAC1 MIXL DAC1 Switch" value="1" />
+        <ctl name="DAC1 MIXR DAC1 Switch" value="1" />
+        <ctl name="Stereo1 DAC MIXL DAC L1 Switch" value="1" />
+        <ctl name="Stereo1 DAC MIXR DAC R1 Switch" value="1" />
+        <ctl name="DAC L1 Source" value="Stereo1 DAC Mixer" />
+        <ctl name="DAC R1 Source" value="Stereo1 DAC Mixer" />
+        <ctl name="HPOL Playback Switch" value="1" />
+        <ctl name="HPOR Playback Switch" value="1" />
+        <path name="mfg-playback headphones" />
+    </path>
+
+    <path name="speaker-all">
+        <ctl name="Main AMP Enable Switch" value="1" />
+        <ctl name="PCM Source" value="ASP" />
+        <ctl name="R Main AMP Enable Switch" value="1" />
+        <ctl name="R PCM Source" value="ASP" />
+        <ctl name="E Main AMP Enable Switch" value="1" />
+        <ctl name="E PCM Source" value="ASP" />
+        <path name="mfg-playback speaker" />
+    </path>
+
+    <path name="loopback-mic-speaker">
+        <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+        <ctl name="SINK_IDS" id="0" value="0" />
+        <ctl name="SINK_IDS" id="1" value="-1" />
+        <path name="mfg-playback" />
+    </path>
+
+    <path name="loopback-mic-headphones">
+        <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+        <ctl name="SINK_IDS" id="0" value="1" />
+        <ctl name="SINK_IDS" id="1" value="-1" />
+        <path name="mfg-playback" />
+    </path>
+
+    <path name="loopback-mic-usb-headphones">
+        <ctl name="MIC HW Gain At Lower Power Mode (cB)" value="-160" />
+        <ctl name="MIC HW Gain At High Power Mode (cB)" value="0" />
+        <ctl name="TDM_0_TX Format" value="S32_LE" />
+        <ctl name="TDM_0_TX Chan" value="One" />
+        <ctl name="EP1 TX Mixer TDM_0_TX" value="1" />
+    </path>
+
+    <path name="loopback-usb-mic-speaker">
+        <ctl name="USB Capture FORMAT v2" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <path name="loopback-usb-mic-usb-headphone">
+        <ctl name="USB Capture FORMAT v2" value="1" />
+        <ctl name="MIC Record Soft Gain (dB)" value="0" />
+    </path>
+
+    <pcm_id name="loopback-mic1" value="EP1 capture (*)"/>
+    <pcm_id name="loopback-mic2" value="EP1 capture (*)"/>
+    <pcm_id name="loopback-mic3" value="EP1 capture (*)"/>
+    <pcm_id name="loopback-mic4" value="EP1 capture (*)"/>
+    <pcm_id name="loopback-speaker1" value="EP3 playback (*)"/>
+    <pcm_id name="loopback-speaker2" value="EP3 playback (*)"/>
+    <pcm_id name="loopback-speaker3" value="EP3 playback (*)"/>
+    <pcm_id name="loopback-headphones" value="EP3 playback (*)"/>
+    <pcm_id name="loopback-usb-headphones" value="EP3 playback (*)"/>
+    <pcm_id name="loopback-usb-mic" value="EP1 capture (*)"/>
+    <pcm_id name="loopback-amp_iv" value="nohost1 capture (*)"/>
+</mixer>
diff --git a/audio/felix/config/sound_trigger_configuration.xml b/audio/felix/config/sound_trigger_configuration.xml
new file mode 100644
index 0000000..dbee090
--- /dev/null
+++ b/audio/felix/config/sound_trigger_configuration.xml
@@ -0,0 +1,33 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2020, The Linux Foundation. All rights reserved.         -->
+<!--                                                                        -->
+<!-- Redistribution and use in source and binary forms, with or without     -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met:                                                                   -->
+<!--     * Redistributions of source code must retain the above copyright   -->
+<!--       notice, this list of conditions and the following disclaimer.    -->
+<!--     * Redistributions in binary form must reproduce the above          -->
+<!--       copyright notice, this list of conditions and the following      -->
+<!--       disclaimer in the documentation and/or other materials provided  -->
+<!--       with the distribution.                                           -->
+<!--     * Neither the name of The Linux Foundation nor the names of its    -->
+<!--       contributors may be used to endorse or promote products derived  -->
+<!--       from this software without specific prior written permission.    -->
+<!--                                                                        -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED           -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF   -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF   -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,  -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          -->
+<sound_trigger_hal_configuration>
+    <supported_model>
+        <model name="CLIENT_HOTWORD" uuid="7038ddc8-30f2-11e6-b0ac-40a8f03d3f15" model_type="keyphrase" bargein="true"/>
+        <model name="CLIENT_AMBIENT_MUSIC" uuid="9f6ad62a-1f0b-11e7-87c5-40a8f03d3f15" model_type="generic" bargein="false"/>
+        <model name="CLIENT_AMBIENT_MUSIC_BREAK" uuid="12caddb1-acdb-4dce-8cb0-2e95a2313aee" model_type="generic" bargein="false"/>
+    </supported_model>
+</sound_trigger_hal_configuration>
diff --git a/audio/felix/cs35l41/crus_sp_cal_mixer_paths.xml b/audio/felix/cs35l41/crus_sp_cal_mixer_paths.xml
new file mode 100644
index 0000000..82af8a7
--- /dev/null
+++ b/audio/felix/cs35l41/crus_sp_cal_mixer_paths.xml
@@ -0,0 +1,307 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.    -->
+<!--                                                                        -->
+<!-- Redistribution and use in source and binary forms, with or without     -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met:                                                                   -->
+<!--     * Redistributions of source code must retain the above copyright   -->
+<!--       notice, this list of conditions and the following disclaimer.    -->
+<!--     * Redistributions in binary form must reproduce the above          -->
+<!--       copyright notice, this list of conditions and the following      -->
+<!--       disclaimer in the documentation and/or other materials provided  -->
+<!--       with the distribution.                                           -->
+<!--     * Neither the name of The Linux Foundation nor the names of its    -->
+<!--       contributors may be used to endorse or promote products derived  -->
+<!--       from this software without specific prior written permission.    -->
+<!--                                                                        -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED           -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF   -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF   -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,  -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          -->
+<mixer>
+    <!-- Initial Values -->
+    <!-- Preload Stage -->
+    <ctl name="Main AMP Enable Switch" value="0" />
+    <ctl name="DSP1 Preload Switch" value="0" />
+    <ctl name="R Main AMP Enable Switch" value="0" />
+    <ctl name="R DSP1 Preload Switch" value="0" />
+    <!-- Clock-trigger Stage -->
+    <ctl name="SINK_IDS" id="0" value="-1"/>
+    <ctl name="SINK_IDS" id="1" value="-1"/>
+    <ctl name="PCM Playback Volume" value="10"/>
+    <ctl name="TDM_0_RX Mixer EP6" value="0"/>
+
+    <!-- Preparation Stage -->
+    <path name="crus-switch-fw-prepare">
+        <ctl name="DRE DRE Switch" value="1" />
+        <ctl name="VBSTMON Output Switch" value="1" />
+        <ctl name="DSP Booted" value="0" />
+        <ctl name="DSP1 Preload Switch" value="0" />
+        <ctl name="R DRE DRE Switch" value="1" />
+        <ctl name="R VBSTMON Output Switch" value="1" />
+        <ctl name="R DSP Booted" value="0" />
+        <ctl name="R DSP1 Preload Switch" value="0" />
+    </path>
+
+    <!-- Preload Stage -->
+    <path name="crus-fw-preload">
+        <ctl name="DSP1 Preload Switch" value="1" />
+        <ctl name="R DSP1 Preload Switch" value="1" />
+    </path>
+
+    <!-- Firmware-switching Stage -->
+    <path name="crus-switch-fw-Calibration">
+        <ctl name="AMP PCM Gain" value="17" />
+        <ctl name="Digital PCM Volume" value="817" />
+        <ctl name="PCM Source" value="DSP" />
+        <ctl name="DSP1 Firmware" value="Calibration" />
+        <ctl name="R AMP PCM Gain" value="17" />
+        <ctl name="R Digital PCM Volume" value="817" />
+        <ctl name="R PCM Source" value="DSP" />
+        <ctl name="R DSP1 Firmware" value="Calibration" />
+    </path>
+
+    <path name="crus-switch-fw-Diagnostic">
+        <ctl name="AMP PCM Gain" value="17" />
+        <ctl name="Digital PCM Volume" value="817" />
+        <ctl name="PCM Source" value="DSP" />
+        <ctl name="DSP1 Firmware" value="Diagnostic" />
+        <ctl name="R AMP PCM Gain" value="17" />
+        <ctl name="R Digital PCM Volume" value="817" />
+        <ctl name="R PCM Source" value="DSP" />
+        <ctl name="R DSP1 Firmware" value="Diagnostic" />
+    </path>
+
+    <path name="crus-switch-fw-Protection">
+        <ctl name="PCM Source" value="DSP" />
+        <ctl name="DSP1 Firmware" value="Protection" />
+        <ctl name="R PCM Source" value="DSP" />
+        <ctl name="R DSP1 Firmware" value="Protection" />
+    </path>
+
+    <!-- DSP-initialization Stage -->
+    <path name="crus-dsp-pre-calibration-amp1">
+        <ctl name="Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="crus-dsp-pre-calibration-amp2">
+        <ctl name="R Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="crus-dsp-pre-calibration">
+        <path name="crus-dsp-pre-calibration-amp1" />
+        <path name="crus-dsp-pre-calibration-amp2" />
+    </path>
+
+    <path name="crus-dsp-pre-diagnostic-amp1">
+        <ctl name="Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="crus-dsp-pre-diagnostic-amp2">
+        <ctl name="R Main AMP Enable Switch" value="1" />
+    </path>
+
+    <path name="crus-dsp-pre-diagnostic">
+        <path name="crus-dsp-pre-diagnostic-amp1" />
+        <path name="crus-dsp-pre-diagnostic-amp2" />
+    </path>
+
+    <path name="crus-dsp-pre-protection">
+        <ctl name="Main AMP Enable Switch" value="1" />
+        <ctl name="R Main AMP Enable Switch" value="1" />
+    </path>
+
+    <!-- Clock-trigger Stage -->
+    <path name="platform-controls">
+        <ctl name="PCM Playback Volume" value="1000"/>
+        <ctl name="SINK_IDS" id="0" value="0"/>
+        <ctl name="SINK_IDS" id="1" value="-1"/>
+        <ctl name="TDM_0_RX Mixer EP6" value="1"/>
+    </path>
+
+    <!-- Post loaded firmware -->
+    <path name="crus-dsp-post-loading-fw">
+        <ctl name="Main AMP Enable Switch" value="0" />
+        <ctl name="R Main AMP Enable Switch" value="0" />
+    </path>
+
+    <!-- Value & Information Fetch Stage -->
+    <path name="platform-values">
+        <ctl name="TDM_0_RX Format" />
+        <ctl name="TDM_0_RX Chan" />
+        <ctl name="TDM_0_RX Sample Rate" />
+        <ctl name="PCM Playback Volume" />
+        <ctl name="TDM_0_RX Mixer EP6" />
+    </path>
+
+    <path name="cs35l41-values">
+        <ctl name="DRE DRE Switch" />
+        <ctl name="R DRE DRE Switch" />
+        <ctl name="VBSTMON Output Switch" />
+        <ctl name="R VBSTMON Output Switch" />
+        <ctl name="AMP PCM Gain" />
+        <ctl name="R AMP PCM Gain" />
+        <ctl name="Digital PCM Volume" />
+        <ctl name="R Digital PCM Volume" />
+        <ctl name="PCM Source" />
+        <ctl name="R PCM Source" />
+        <ctl name="DSP Booted" />
+        <ctl name="R DSP Booted" />
+        <ctl name="Main AMP Enable Switch" />
+        <ctl name="R Main AMP Enable Switch" />
+        <ctl name="DSP1 Preload Switch" />
+        <ctl name="R DSP1 Preload Switch" />
+        <ctl name="DSP1 Firmware" />
+        <ctl name="R DSP1 Firmware" />
+    </path>
+
+
+    <!-- Note that the order of controls does matter because
+         it should be matched to the structure defined in
+         sp_cal_common.h -->
+    <!--
+        struct calibration_data {
+            unsigned int cal_r;
+            unsigned int cal_status;
+            unsigned int cal_checksum;
+            unsigned int cal_ambient;
+            unsigned int amp_pcm_gain;
+            unsigned int digital_pcm_gain;
+        };
+    -->
+    <path name="cs35l41-dsp-amp1-calibration-values">
+        <ctl name="DSP1 Calibration cd CAL_R" />
+        <ctl name="DSP1 Calibration cd CAL_STATUS" />
+        <ctl name="DSP1 Calibration cd CAL_CHECKSUM" />
+        <ctl name="DSP1 Calibration cd CAL_AMBIENT" />
+        <ctl name="AMP PCM Gain" />
+        <ctl name="Digital PCM Volume" />
+
+        <!-- Only for debug print -->
+        <ctl name="DSP1 Calibration cd CAL_SET_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-calibration-values">
+        <ctl name="R DSP1 Calibration cd CAL_R" />
+        <ctl name="R DSP1 Calibration cd CAL_STATUS" />
+        <ctl name="R DSP1 Calibration cd CAL_CHECKSUM" />
+        <ctl name="R DSP1 Calibration cd CAL_AMBIENT" />
+        <ctl name="R AMP PCM Gain" />
+        <ctl name="R Digital PCM Volume" />
+
+        <!-- Only for debug print -->
+        <ctl name="R DSP1 Calibration cd CAL_SET_STATUS" />
+    </path>
+
+    <!--
+        struct diagnostic_data {
+            struct calibration_data calibration_data;
+            unsigned int z_low_diff;
+            unsigned int diag_f0;
+            unsigned int diag_f0_status;
+        };
+    -->
+    <path name="cs35l41-dsp-amp1-diagnostic-values">
+        <!-- struct calibration_data START -->
+        <ctl name="DSP1 Diagnostic cd CAL_R" />
+        <ctl name="DSP1 Diagnostic cd CAL_STATUS" />
+        <ctl name="DSP1 Diagnostic cd CAL_CHECKSUM" />
+        <ctl name="DSP1 Diagnostic cd CAL_AMBIENT" />
+        <ctl name="AMP PCM Gain" />
+        <ctl name="Digital PCM Volume" />
+        <!-- struct calibration_data END -->
+        <ctl name="DSP1 Diagnostic cd DIAG_Z_LOW_DIFF" />
+        <ctl name="DSP1 Diagnostic cd DIAG_F0" />
+        <ctl name="DSP1 Diagnostic cd DIAG_F0_STATUS" />
+
+        <!-- Only for debug print -->
+        <ctl name="DSP1 Diagnostic cd CAL_SET_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-diagnostic-values">
+        <!-- struct calibration_data START -->
+        <ctl name="R DSP1 Diagnostic cd CAL_R" />
+        <ctl name="R DSP1 Diagnostic cd CAL_STATUS" />
+        <ctl name="R DSP1 Diagnostic cd CAL_CHECKSUM" />
+        <ctl name="R DSP1 Diagnostic cd CAL_AMBIENT" />
+        <ctl name="R AMP PCM Gain" />
+        <ctl name="R Digital PCM Volume" />
+        <!-- struct calibration_data END -->
+        <ctl name="R DSP1 Diagnostic cd DIAG_Z_LOW_DIFF" />
+        <ctl name="R DSP1 Diagnostic cd DIAG_F0" />
+        <ctl name="R DSP1 Diagnostic cd DIAG_F0_STATUS" />
+
+        <!-- Only for debug print -->
+        <ctl name="R DSP1 Diagnostic cd CAL_SET_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp1-protection-values">
+        <!-- struct calibration_data START -->
+        <ctl name="DSP1 Protection cd CAL_R" />
+        <ctl name="DSP1 Protection cd CAL_STATUS" />
+        <ctl name="DSP1 Protection cd CAL_CHECKSUM" />
+        <ctl name="DSP1 Protection cd CAL_AMBIENT" />
+
+        <!-- These controls are unrelated so we can simply
+             skip them
+        <ctl name="AMP PCM Gain" />
+        <ctl name="Digital PCM Volume" />
+        -->
+        <!-- struct calibration_data END -->
+    </path>
+
+    <path name="cs35l41-dsp-amp2-protection-values">
+        <!-- struct calibration_data START -->
+        <ctl name="R DSP1 Protection cd CAL_R" />
+        <ctl name="R DSP1 Protection cd CAL_STATUS" />
+        <ctl name="R DSP1 Protection cd CAL_CHECKSUM" />
+        <ctl name="R DSP1 Protection cd CAL_AMBIENT" />
+
+        <!-- These controls are unrelated so we can simply
+             skip them
+        <ctl name="R AMP PCM Gain" />
+        <ctl name="R Digital PCM Volume" />
+        -->
+        <!-- struct calibration_data END -->
+    </path>
+
+    <path name="cs35l41-dsp-amp1-calibration-completion">
+        <ctl name="DSP1 Calibration cd CAL_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-calibration-completion">
+        <ctl name="R DSP1 Calibration cd CAL_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp1-protection-completion">
+        <ctl name="DSP1 Protection cd CAL_SET_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-protection-completion">
+        <ctl name="R DSP1 Protection cd CAL_SET_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp1-diagnostic-completion">
+        <ctl name="DSP1 Diagnostic cd CAL_STATUS" />
+        <ctl name="DSP1 Diagnostic cd DIAG_F0_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-diagnostic-completion">
+        <ctl name="R DSP1 Diagnostic cd CAL_STATUS" />
+        <ctl name="R DSP1 Diagnostic cd DIAG_F0_STATUS" />
+    </path>
+
+    <path name="cs35l41-dsp-amp1-enable-status">
+        <ctl name="Main AMP Enable Switch" />
+    </path>
+
+    <path name="cs35l41-dsp-amp2-enable-status">
+        <ctl name="R Main AMP Enable Switch" />
+    </path>
+</mixer>
diff --git a/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin b/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-cali.bin
new file mode 100644
index 0000000..1ac4066
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diff --git a/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin b/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-diag.bin
new file mode 100644
index 0000000..5a3a4f5
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diff --git a/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin b/audio/felix/cs35l41/fw/R-cs35l41-dsp1-spk-prot.bin
new file mode 100644
index 0000000..e12bcd2
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-cali.bin b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-cali.bin
new file mode 100644
index 0000000..853f77a
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-cali.wmfw
new file mode 100644
index 0000000..5530a4d
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-diag.bin b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-diag.bin
new file mode 100644
index 0000000..d7b5842
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-diag.wmfw
new file mode 100644
index 0000000..616262a
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-prot.bin b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-prot.bin
new file mode 100644
index 0000000..89b2267
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diff --git a/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw b/audio/felix/cs35l41/fw/cs35l41-dsp1-spk-prot.wmfw
new file mode 100644
index 0000000..5530a4d
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diff --git a/audio/felix/factory-audio-tables.mk b/audio/felix/factory-audio-tables.mk
new file mode 100644
index 0000000..e5056d8
--- /dev/null
+++ b/audio/felix/factory-audio-tables.mk
@@ -0,0 +1,22 @@
+#
+# Copyright (C) 2020 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+AUDIO_FACTORY_TABLE_FOLDER := felix
+
+# Mixer Path Configuration for Audio Factory
+PRODUCT_COPY_FILES += \
+    device/google/felix/audio/$(AUDIO_FACTORY_TABLE_FOLDER)/config/mixer_paths_factory.xml:$(TARGET_COPY_OUT_VENDOR)/etc/mixer_paths_factory.xml
+
diff --git a/audio/felix/tuning/bluenote/exported.xml b/audio/felix/tuning/bluenote/exported.xml
new file mode 100644
index 0000000..48a2104
--- /dev/null
+++ b/audio/felix/tuning/bluenote/exported.xml
@@ -0,0 +1,298 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<tunings>
+  <tuning>
+    <keys>
+      <key>1170956864708935680</key>
+      <key>1170957964220563456</key>
+      <key>3494866978118565888</key>
+    </keys>
+    <signalflow id="3" name="Spatial Audio">
+      <module id="101" name="Auto Gain Control">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="GainApplied" size="1" type="float">0.0</param>
+        <param id="32" name="idealRMS" size="1" type="float">0.0</param>
+        <param id="33" name="noiseGate" size="1" type="float">0.0</param>
+        <param id="34" name="minGain" size="1" type="float">0.0</param>
+        <param id="35" name="maxGain" size="1" type="float">0.0</param>
+        <param id="36" name="longGainAtRt" size="1" type="uint32">0</param>
+        <param id="37" name="GainAtRt" size="1" type="uint32">0</param>
+        <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+      </module>
+      <module id="102" name="Surround Record">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="alpha" size="1" type="float">0.0</param>
+      </module>
+      <module id="103" name="Multi Channel IIR">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="numChannels" size="1" type="uint32">1</param>
+        <struct id="32">
+          <param id="-1" name="numSections" size="1" type="uint32">0</param>
+          <param id="-1" name="coeffPtr" size="150" type="float">0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0</param>
+        </struct>
+        <param id="33" name="gainPtr" size="3" type="int32">0,0,0</param>
+      </module>
+      <module id="104" name="Multi Band DRC">
+        <param id="0" name="opMode_" size="1" type="uint32">3</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <struct id="31">
+          <param id="-1" name="numBand" size="1" type="uint32">1</param>
+          <param id="-1" name="ch0_cross_profile" size="3072" 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+          <param id="-1" name="band0_numOfKnee" size="1" type="uint32">1</param>
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+          <param id="-1" name="band1_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_delay_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_rms_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_Min_Gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
+          <param id="-1" name="band2_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+        </struct>
+        <struct id="33">
+          <param id="-1" name="limiter_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="limiter_threadhold_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="limiter_attackTime_ms" size="1" type="uint32">0</param>
+          <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+        </struct>
+      </module>
+    </signalflow>
+  </tuning>
+  <tuning>
+    <keys>
+      <key>2323914724061741056</key>
+      <key>2323914741241610240</key>
+    </keys>
+    <signalflow id="1" name="Fortemdia">
+      <module id="1" name="Forty"/>
+    </signalflow>
+  </tuning>
+  <tuning>
+    <keys>
+      <key>2323914728356708352</key>
+    </keys>
+    <signalflow id="2" name="Waves">
+      <module id="2" name="Waves"/>
+    </signalflow>
+  </tuning>
+  <tuning>
+    <keys>
+      <key>2323915136378601472</key>
+    </keys>
+    <signalflow id="3" name="Spatial Audio">
+      <module id="101" name="Auto Gain Control">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="GainApplied" size="1" type="float">0.0</param>
+        <param id="32" name="idealRMS" size="1" type="float">0.0</param>
+        <param id="33" name="noiseGate" size="1" type="float">0.0</param>
+        <param id="34" name="minGain" size="1" type="float">0.0</param>
+        <param id="35" name="maxGain" size="1" type="float">0.0</param>
+        <param id="36" name="longGainAtRt" size="1" type="uint32">0</param>
+        <param id="37" name="GainAtRt" size="1" type="uint32">0</param>
+        <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+      </module>
+      <module id="102" name="Surround Record">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="alpha" size="1" type="float">0.0</param>
+      </module>
+      <module id="103" name="Multi Channel IIR">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="numChannels" size="1" type="uint32">1</param>
+        <struct id="32">
+          <param id="-1" name="numSections" size="1" type="uint32">0</param>
+          <param id="-1" name="coeffPtr" size="150" type="float">0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0</param>
+        </struct>
+        <param id="33" name="gainPtr" size="3" type="int32">0,0,0</param>
+      </module>
+      <module id="104" name="Multi Band DRC">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <struct id="31">
+          <param id="-1" name="numBand" size="1" type="uint32">1</param>
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+          <param id="-1" name="band0_numOfKnee" size="1" type="uint32">1</param>
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+          <param id="-1" name="band1_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band1_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_delay_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_rms_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_Min_Gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
+          <param id="-1" name="band2_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+        </struct>
+        <struct id="33">
+          <param id="-1" name="limiter_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="limiter_threadhold_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="limiter_attackTime_ms" size="1" type="uint32">0</param>
+          <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+        </struct>
+      </module>
+    </signalflow>
+  </tuning>
+  <tuning>
+    <keys>
+      <key>2323922832959995904</key>
+    </keys>
+    <signalflow id="3" name="Spatial Audio">
+      <module id="101" name="Auto Gain Control">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="GainApplied" size="1" type="float">0.0</param>
+        <param id="32" name="idealRMS" size="1" type="float">0.0</param>
+        <param id="33" name="noiseGate" size="1" type="float">0.0</param>
+        <param id="34" name="minGain" size="1" type="float">0.0</param>
+        <param id="35" name="maxGain" size="1" type="float">0.0</param>
+        <param id="36" name="longGainAtRt" size="1" type="uint32">0</param>
+        <param id="37" name="GainAtRt" size="1" type="uint32">0</param>
+        <param id="38" name="rmsTav" size="1" type="uint32">0</param>
+      </module>
+      <module id="102" name="Surround Record">
+        <param id="0" name="opMode_" size="1" type="uint32">0</param>
+        <param id="1" name="fs_" size="1" type="uint32">0</param>
+        <param id="2" name="numCh_" size="1" type="uint32">0</param>
+        <param id="3" name="chMask_" size="1" type="uint32">0</param>
+        <param id="31" name="alpha" size="1" type="float">0.0</param>
+      </module>
+      <module id="103" name="Multi Channel IIR">
+        <param id="0" name="opMode_" size="1" type="uint32">2</param>
+        <param id="1" name="fs_" size="1" type="uint32">5</param>
+        <param id="2" name="numCh_" size="1" type="uint32">4</param>
+        <param id="3" name="chMask_" size="1" type="uint32">5</param>
+        <param id="31" name="numChannels" size="1" type="uint32">1</param>
+        <struct id="32">
+          <param id="-1" name="numSections" size="1" type="uint32">2</param>
+          <param id="-1" name="coeffPtr" size="150" type="float">-0.9,0.70000005,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0,0.0</param>
+        </struct>
+        <param id="33" name="gainPtr" size="3" type="int32">10,0,0</param>
+      </module>
+      <module id="104" name="Multi Band DRC">
+        <param id="0" name="opMode_" size="1" type="uint32">3</param>
+        <param id="1" name="fs_" size="1" type="uint32">9</param>
+        <param id="2" name="numCh_" size="1" type="uint32">6</param>
+        <param id="3" name="chMask_" size="1" type="uint32">10</param>
+        <struct id="31">
+          <param id="-1" name="numBand" size="1" type="uint32">2</param>
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+          <param id="-1" name="band0_rms_ms" size="1" type="float">0.5</param>
+          <param id="-1" name="band0_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band0_Min_Gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band0_numOfKnee" size="1" type="uint32">1</param>
+          <param id="-1" name="band0_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band0_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band0_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band0_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band0_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band0_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band1_delay_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band1_rms_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band1_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band1_Min_Gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band1_numOfKnee" size="1" type="float">1.0</param>
+          <param id="-1" name="band1_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band1_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band1_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
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+          <param id="-1" name="band1_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band1_hysteresis" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_delay_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_rms_ms" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_Min_Gain_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="band2_numOfKnee" size="1" type="uint32">1</param>
+          <param id="-1" name="band2_threadhold_dB" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_compressRatio" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_kneeWidth" size="3" type="float">0.0,0.0,0.0</param>
+          <param id="-1" name="band2_attackTime_ms" size="4" type="float">0.0,0.0,0.0,0.0</param>
+          <param id="-1" name="band2_releaseTime_ms" size="4" type="float">0.0,0.0,0.0,0.6</param>
+          <param id="-1" name="band2_hysteresis" size="4" type="float">0.0,0.5,0.0,0.6</param>
+        </struct>
+        <struct id="33">
+          <param id="-1" name="limiter_gain_dB" size="1" type="float">0.70000005</param>
+          <param id="-1" name="limiter_threadhold_dB" size="1" type="float">0.0</param>
+          <param id="-1" name="limiter_attackTime_ms" size="1" type="uint32">0</param>
+          <param id="-1" name="limiter_releaseTime_ms" size="1" type="uint32">0</param>
+        </struct>
+      </module>
+    </signalflow>
+  </tuning>
+</tunings>
diff --git a/audio/felix/tuning/bluenote/recording.gatf b/audio/felix/tuning/bluenote/recording.gatf
new file mode 100644
index 0000000..320cddb
Binary files /dev/null and b/audio/felix/tuning/bluenote/recording.gatf differ
diff --git a/audio/felix/tuning/bluenote/template.xml b/audio/felix/tuning/bluenote/template.xml
new file mode 100644
index 0000000..52a75ba
--- /dev/null
+++ b/audio/felix/tuning/bluenote/template.xml
@@ -0,0 +1,287 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<template>
+  <modules>
+    <module id="2" name="Waves">
+      <param id="0" max="3" name="opMode_" type="uint32"/>
+    </module>
+    <module id="3" name="Forte">
+      <param id="0" max="3" name="opMode_" type="uint32"/>
+    </module>
+    <module id="5" name="Auto Gain Control">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="1" id="2" name="numCh_" type="uint32"/>
+      <param default="1" id="3" name="chMask_" type="uint32"/>
+      <param id="16" name="GainApplied" type="float"/>
+      <param id="17" name="idealRMS" type="float"/>
+      <param id="18" name="noiseGate" type="float"/>
+      <param id="19" name="minGain" type="float"/>
+      <param id="20" name="maxGain" type="float"/>
+      <param id="21" name="longGainAtRt" type="uint32"/>
+      <param id="22" name="GainAtRt" type="uint32"/>
+      <param id="23" name="rmsTav" type="uint32"/>
+    </module>
+    <module id="6" name="Surround Record">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="3" id="2" name="numCh_" type="uint32"/>
+      <param default="7" id="3" name="chMask_" type="uint32"/>
+      <param id="16" max="1" min="0" name="alpha" type="float"/>
+      <param complex="true" id="17" name="ch0_profileL" size="1024" type="float"/>
+      <param complex="true" id="18" name="ch1_profileL" size="1024" type="float"/>
+      <param complex="true" id="19" name="ch2_profileL" size="1024" type="float"/>
+      <param complex="true" id="20" name="ch0_profileR" size="1024" type="float"/>
+      <param complex="true" id="21" name="ch1_profileR" size="1024" type="float"/>
+      <param complex="true" id="22" name="ch2_profileR" size="1024" type="float"/>
+      <param complex="true" id="23" name="ch0_profileAZ" size="1024" type="float"/>
+      <param complex="true" id="24" name="ch1_profileAZ" size="1024" type="float"/>
+      <param complex="true" id="25" name="ch2_profileAZ" size="1024" type="float"/>
+      <struct id="26">
+        <param default="1" name="ch_gain" type="float"/>
+        <param default="1" name="zoom_gain" type="float"/>
+      </struct>
+      <param default="0" id="27" name="ch0_assignFrom" type="int32"/>
+      <param default="1" id="28" name="ch1_assignFrom" type="int32"/>
+      <param default="2" id="29" name="ch2_assignFrom" type="int32"/>
+    </module>
+    <module id="7" name="Multi Channel IIR 2">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="3" id="2" name="numCh_" type="uint32"/>
+      <param default="1" id="3" name="chMask_" type="uint32"/>
+      <param default="3" id="16" max="3" min="1" name="numOfChannel" type="uint32"/>
+      <param id="17" name="coeff" size="300" type="float"/>
+      <struct id="18">
+        <param max="18" min="-96" name="gain" size="60" type="float"/>
+        <param max="24000" min="0" name="frequency" size="60" type="uint32"/>
+        <param max="200" min="0" name="qfactor" size="60" type="float"/>
+        <param default="4" name="type" size="60" type="int32"/>
+      </struct>
+    </module>
+    <module id="8" name="Multi Band DRC">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <struct id="16">
+        <param default="1" max="3" min="1" name="numBand" type="uint32"/>
+        <param name="IIR_LowPass1" size="5" type="float"/>
+        <param name="IIR_HighPass1" size="5" type="float"/>
+        <param name="IIR_LowPass2" size="5" type="float"/>
+        <param name="IIR_HighPass2" size="5" type="float"/>
+      </struct>
+      <struct id="17">
+        <param max="20" min="0" name="band0_delay_ms" type="float"/>
+        <param default="5" max="20" min="0" minInclusive="false" name="band0_rms_ms" type="float"/>
+        <param max="30" min="0" name="band0_gain_dB" type="float"/>
+        <param max="30" min="-30" name="band0_Min_Gain_dB" type="float"/>
+        <param default="1" max="3" min="1" name="band0_numOfKnee" type="uint32"/>
+        <param name="band0_threadhold_dB" size="3" type="float"/>
+        <param name="band0_compressRatio" size="4" type="float"/>
+        <param name="band0_kneeWidth" size="3" type="float"/>
+        <param name="band0_attackTime_ms" size="4" type="float"/>
+        <param name="band0_releaseTime_ms" size="4" type="float"/>
+        <param name="band0_hysteresis" size="4" type="float"/>
+        <param max="20" min="0" name="band1_delay_ms" type="float"/>
+        <param default="5" max="20" min="0" minInclusive="false" name="band1_rms_ms" type="float"/>
+        <param max="30" min="0" name="band1_gain_dB" type="float"/>
+        <param max="30" min="-30" name="band1_Min_Gain_dB" type="float"/>
+        <param default="1" max="3" min="1" name="band1_numOfKnee" type="uint32"/>
+        <param name="band1_threadhold_dB" size="3" type="float"/>
+        <param name="band1_compressRatio" size="4" type="float"/>
+        <param name="band1_kneeWidth" size="3" type="float"/>
+        <param name="band1_attackTime_ms" size="4" type="float"/>
+        <param name="band1_releaseTime_ms" size="4" type="float"/>
+        <param name="band1_hysteresis" size="4" type="float"/>
+        <param max="20" min="0" name="band2_delay_ms" type="float"/>
+        <param default="5" max="20" min="0" minInclusive="false" name="band2_rms_ms" type="float"/>
+        <param max="30" min="0" name="band2_gain_dB" type="float"/>
+        <param max="30" min="-30" name="band2_Min_Gain_dB" type="float"/>
+        <param default="1" max="3" min="1" name="band2_numOfKnee" type="uint32"/>
+        <param name="band2_threadhold_dB" size="3" type="float"/>
+        <param name="band2_compressRatio" size="4" type="float"/>
+        <param name="band2_kneeWidth" size="3" type="float"/>
+        <param name="band2_attackTime_ms" size="4" type="float"/>
+        <param name="band2_releaseTime_ms" size="4" type="float"/>
+        <param name="band2_hysteresis" size="4" type="float"/>
+      </struct>
+      <struct id="18">
+        <param max="30" min="-30" name="limiter_gain_dB" type="float"/>
+        <param max="0" min="-30" name="limiter_threadhold_dB" type="float"/>
+        <param max="100" min="0" name="limiter_attackTime_ms" type="float"/>
+        <param max="100" min="0" name="limiter_releaseTime_ms" type="float"/>
+      </struct>
+      <struct id="19">
+        <param name="frequency0" type="uint32"/>
+        <param name="frequency1" type="uint32"/>
+      </struct>
+    </module>
+    <module id="11" name="Stationary Noise Suppression">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <param default="1" id="16" name="strength level" type="uint32"/>
+      <param id="17" name="POWER_TIME_SMOOTH" type="float"/>
+      <param id="18" name="RMS_TIME_SMOOTH" type="float"/>
+      <param id="19" name="LOWER_BAND_THRESHOLD" size="129" type="float"/>
+      <param id="20" name="UPPER_BAND_THRESHOLD" size="3" type="float"/>
+      <param id="21" name="ATTACK_TIME" type="float"/>
+      <param id="22" name="RELEASE_TIME" type="float"/>
+    </module>
+    <module id="14" name="Linear Gain">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="1" id="2" name="numCh_" type="uint32"/>
+      <param default="1" id="3" name="chMask_" type="uint32"/>
+      <param id="16" name="Simple_gain" type="float"/>
+      <param default="0" id="17" name="ch0_assignFrom" type="int32"/>
+      <param default="1" id="18" name="ch1_assignFrom" type="int32"/>
+      <param default="2" id="19" name="ch2_assignFrom" type="int32"/>
+    </module>
+    <module id="17" name="Wind Noise Reduction">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <param default="450" id="16" name="DECISION_SMOOTHING_FACTOR" type="int32"/>
+      <param default="50" id="17" name="DECISION_ATTACK_SMOOTHING_FACTOR" type="int32"/>
+      <param default="50" id="18" name="DECISION_RELEASE_HIGH_SMOOTHING_FACTOR" type="int32"/>
+      <param default="50" id="19" name="DECISION_RELEASE_LOW_SMOOTHING_FACTOR" type="int32"/>
+      <param default="700" id="20" name="DECISION_RELEASE_THRESHOLD" type="int32"/>
+      <param default="0" id="21" name="DECISION_RANGE_OFFSET_FACTOR" type="int32"/>
+      <param default="1000" id="22" name="DECISION_RANGE_SLOPE_FACTOR" type="int32"/>
+      <param default="450" id="23" name="DECISION_GAIN_SMOOTHING_FACTOR" type="int32"/>
+      <param default="27" id="24" name="DECISION_DB_RANGE" type="int32"/>
+      <param default="1000" id="25" name="MASTER_REDUCTION_FACTOR" type="int32"/>
+      <param default="15" id="26" name="KEEP_NUM_OF_PREV_DECISIONS" type="int32"/>
+      <param default="1000" id="27" name="DEC_PRE_GAIN" type="int32"/>
+      <param default="16000" id="28" name="SUP_PRE_GAIN" type="int32"/>
+      <param default="2" id="29" name="COHERENCE_ENABLE" type="int32"/>
+      <param default="1" id="30" name="COHERENCE_START_BIN" type="int32"/>
+      <param default="10" id="31" name="COHERENCE_END_BIN" type="int32"/>
+      <param default="300" id="32" name="COHERENCE_THRESHOLD" type="int32"/>
+      <param default="990" id="33" name="COHERENCE_FORGETTING_FACTOR" type="int32"/>
+      <param default="0" id="34" name="DB_SCALING_FACTOR" type="int32"/>
+      <param default="9" id="35" name="SEP_LAYER" type="int32"/>
+      <param default="1" id="36" name="SP_GAIN_ENABLE" type="int32"/>
+      <param default="15" id="37" name="SP_GAIN_MAX_BIN" type="int32"/>
+      <param default="500" id="38" name="SP_GAIN_MIN" type="int32"/>
+      <param default="200" id="39" name="SP_GAIN_TH_MIN" type="int32"/>
+      <param default="450" id="40" name="SP_GAIN_TH_MAX" type="int32"/>
+      <param default="800" id="41" name="SP_GAIN_SMOOTH" type="int32"/>
+      <param default="3" id="42" name="SP_GAIN_FREQ_SMOOTH" type="int32"/>
+      <param default="300" id="43" name="MASTER_MAX_SUP_SMOOTHING_FACTOR" type="int32"/>
+      <param default="1" id="44" name="GAIN_FREQ_SMOOTH" type="int32"/>
+      <param default="2" id="45" name="GMIN_CURVE_TYPE" type="int32"/>
+      <param default="55" id="46" name="GMIN_LINEAR_SPLIT_MID_POINT_BINR" type="int32"/>
+      <param default="330" id="47" name="GMIN_LINEAR_SPLIT_MID_POINT_VAL" type="int32"/>
+      <param default="1000" id="48" name="SP_OVERSUB_RATIO" type="int32"/>
+      <param default="16" id="49" name="WIND_ENERGY_EST_COMPENSATION_GAIN" type="int32"/>
+      <param default="2000" id="50" name="WIND_ENERGY_CURVE_SLOPE" type="int32"/>
+      <param default="300" id="51" name="WIND_ENERGY_CURVE_OFFSET" type="int32"/>
+      <param default="16000" id="52" name="WIND_ENERGY_CURVE_MIN" type="int32"/>
+      <param default="16000" id="53" name="WIND_ENERGY_CURVE_MAX" type="int32"/>
+      <param default="900" id="54" name="WIND_ENERGY_SMOOTHING" type="int32"/>
+      <param default="144" id="55" name="WIND_ENERGY_NORM_DENOM" type="int32"/>
+      <param default="600" id="56" name="WIND_ENERGY_CURVE_SCALED_TH_MIN" type="int32"/>
+      <param default="900" id="57" name="WIND_ENERGY_CURVE_SCALED_TH_MAX" type="int32"/>
+      <param default="1" id="58" name="ENABLE_ML_COMBI_WIND_ENERGY" type="int32"/>
+      <param default="1" id="59" name="ENABLE_SP_COMBI_WIND_ENERGY" type="int32"/>
+      <param default="1" id="60" name="ENALBE_SP_COMBI_OVERSUBTRACTION" type="int32"/>
+      <param default="1" id="61" name="ENABLE_PRIORI_SNR" type="int32"/>
+      <param default="1000" id="62" name="PRIORI_SNR_ML_TUNING" type="int32"/>
+      <param default="15" id="63" name="DEC_PREV_NUM" type="int32"/>
+      <param default="1" id="64" name="SSC_ENABLE" type="int32"/>
+      <param default="930" id="65" name="SSC_SOFT_SMOOTHING_FACTOR" type="int32"/>
+      <param default="1600" id="66" name="SSC_OVERDRIVE" type="int32"/>
+      <param default="3" id="67" name="SSC_MIN_FREQ" type="int32"/>
+      <param default="130" id="68" name="SSC_MAX_FREQ" type="int32"/>
+      <param default="700" id="69" name="SSC_PSD_SMOOTHING_FACTOR" type="int32"/>
+      <param default="12" id="70" name="SSC_SOFT_DECISION_MIN_FREQ" type="int32"/>
+      <param default="450" id="71" name="SSC_SOFT_DECISION_MAX_FREQ" type="int32"/>
+      <param default="5" id="72" name="SSC_KEEP_SAVED_PROB_SMOOTH_SIZE" type="int32"/>
+      <param default="1000" id="73" name="GAIN_BOOSTING_COST" type="int32"/>
+    </module>
+    <module id="18" name="Multi Channel IIR 1">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <param default="3" id="16" max="3" min="1" name="numOfChannel" type="uint32"/>
+      <param id="17" name="coeff" size="300" type="float"/>
+      <struct id="18">
+        <param max="18" min="-96" name="gain" size="60" type="float"/>
+        <param max="24000" min="0" name="frequency" size="60" type="uint32"/>
+        <param max="200" min="0" name="qfactor" size="60" type="float"/>
+        <param default="4" name="type" size="60" type="int32"/>
+      </struct>
+    </module>
+    <module id="32" name="Single Band DRC">
+      <param default="1" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <struct id="16">
+        <param max="20" min="0" name="delay_ms" type="float"/>
+        <param default="5" max="20" min="0" minInclusive="false" name="rms_ms" type="float"/>
+        <param max="30" min="0" name="gain_dB" type="float"/>
+        <param max="30" min="-30" name="Min_Gain_dB" type="float"/>
+        <param default="1" max="3" min="1" name="numOfKnee" type="uint32"/>
+        <param name="threadhold_dB" size="3" type="float"/>
+        <param name="compressRatio" size="4" type="float"/>
+        <param name="kneeWidth" size="3" type="float"/>
+        <param name="attackTime_ms" size="4" type="float"/>
+        <param name="releaseTime_ms" size="4" type="float"/>
+        <param name="hysteresis" size="4" type="float"/>
+      </struct>
+      <struct id="17">
+        <param max="30" min="-30" name="limiter_gain_dB" type="float"/>
+        <param max="0" min="-30" name="limiter_threadhold_dB" type="float"/>
+        <param max="100" min="0" name="limiter_attackTime_ms" type="uint32"/>
+        <param max="100" min="0" name="limiter_releaseTime_ms" type="uint32"/>
+      </struct>
+    </module>
+    <module id="10000" name="Eraser">
+      <param id="275" name="eraser_pre_gain" type="uint32"/>
+      <param id="277" name="eraser_post_gain" type="uint32"/>
+      <param id="279" name="non_eraser_gain" type="uint32"/>
+    </module>
+    <module id="10001" name="Cleaner">
+      <param id="299" name="cleaner_post_gain" type="uint32"/>
+    </module>
+    <module id="10002" name="CHRE">
+      <param id="297" name="chre_gain" type="uint32"/>
+    </module>
+  </modules>
+  <signalflows>
+    <signalflow id="1" name="Spatial Audio">
+      <block id="128">
+        <moduleRef id="18"/>
+        <moduleRef id="17"/>
+      </block>
+      <block id="134">
+        <moduleRef id="14"/>
+        <moduleRef id="11"/>
+        <moduleRef id="6"/>
+        <moduleRef id="7"/>
+        <moduleRef id="5"/>
+        <moduleRef id="8"/>
+      </block>
+    </signalflow>
+    <signalflow id="2" name="General Mic Recording">
+      <block id="137">
+        <moduleRef id="14"/>
+        <moduleRef id="7"/>
+        <moduleRef id="8"/>
+      </block>
+    </signalflow>
+    <signalflow id="1000" name="Smart Feature">
+      <block id="0">
+        <moduleRef id="10000"/>
+        <moduleRef id="10001"/>
+        <moduleRef id="10002"/>
+      </block>
+    </signalflow>
+  </signalflows>
+</template>
diff --git a/audio/felix/tuning/bluenote/tuning_constraints_combination.xml b/audio/felix/tuning/bluenote/tuning_constraints_combination.xml
new file mode 100644
index 0000000..37a63d5
--- /dev/null
+++ b/audio/felix/tuning/bluenote/tuning_constraints_combination.xml
@@ -0,0 +1,1284 @@
+<?xml version="1.0" encoding="utf-8"?>
+
+<!--
+  This is the constraints template for users to define (1) constraint terms
+  and (2) tuning architecture.
+
+  The architecture can be divided into multiple audio features that a mobile
+  device will support.
+
+  1. Telephony
+  2. Audio Output
+  3. Audio Input
+  4. Ambient Compute / Smart Features
+  5. Others
+
+  Also, the tuning architecture could be in reality treated as a tree like structure
+  below and each node represents a triplet of (category, node name, constraint name).
+
+  They'd be parsed into the logic behind the combobox drop down list dependent items.
+  For more information, please check go/bluenote-uc-dd and go/blutenote-uc-treenote.
+
+  e.g.
+
+  (ROOT, root, Root)
+   |
+   -(FEATURE, telephony1, Telephony)
+     |
+     -(CATEGORY, voip1, VoIP)
+      |
+      -(USECASE, headset1, Headset1)
+      | |
+      | -(CARRIER, generic1, Generic)
+      |  |
+      |  -(NETWORK, gsm1, GSM)
+      |     |
+      |     -(CODEC, codec3, Codec3)
+      |     |  |
+      |     |  -(BAND, fb1, FB)
+      |     |  |
+      |     |  -(BAND, nb1, NB)
+      |
+      -(USECASE, handset1, Handset1)
+      |  |
+      |  -(CARRIER, tmo1, TMOUS)
+      |   |
+      |   -(NETWORK, gsm1, GSM)
+      |    |
+      |    -(CODEC, codec3, Codec3)
+      |      |
+      |      -(BAND, fb1, FB)
+      |      |
+      |      -(BAND, nb1, NB)
+      |
+      -(USECASE, handset2, Handset1)
+         |
+         -(CARRIER, vzw1, VZW)
+          |
+          -(NETWORK, gsm2, GSM)
+          | |
+          | -(CODEC, codec1, Codec1)
+          |   |
+          |   -(BAND, fb1, FB)
+          |   |
+          |   -(BAND, swb1, SWB)
+          |
+          |
+          -(NETWORK, cdma1, CDMA)
+            |
+            -(CODEC, codec1, Codec1)
+              |
+              -(BAND, fb1, FB)
+              |
+              -(BAND, swb1, SWB)
+
+
+  NOTE: Users required to edit the terms and tree nodes (UI combobox mapping) below
+  for constraint combination.
+
+  Attributes:
+
+    value             The constraint value in given field.
+    name              The constraint term.
+    type              What feature type it belongs to.
+    id                The unique identifier for object or node.
+    node              The reference node.
+    tx-path           The transmit audio path.
+    rx-path           The receive audio path.
+    mixer-ref         The referenced mixer name.
+    ref               The referenced hardware.
+
+-->
+<constraints>
+
+  <!-- (1) Constraint Terms -->
+  <!--
+    Feature (4 bits)
+  -->
+  <feature value="1" name="Telephony" />
+  <feature value="2" name="Playback" />
+  <feature value="3" name="Recording" />
+  <feature value="4" name="SmartFeature" />
+
+  <!--
+    Category
+  -->
+  <category type="telephony" name="Cellular" />
+  <category type="telephony" name="VoIP EC NS" />
+  <category type="telephony" name="TTY" />
+  <category type="telephony" name="Google-Fi" />
+  <category type="playback" name="Sound" />
+  <category type="record" name="Record" />
+  <category type="record" name="Camcorder" />
+  <category type="record" name="VR" />
+  <category type="record" name="Unprocessed" />
+  <category type="hotword" name="Default" />
+
+  <!--
+    Usecase
+  -->
+  <usecase type="telephony" name="Receiver mode"
+           tx-path="device_in_voice_handset_mic"
+           rx-path="device_out_voice_handset" />
+  <usecase type="telephony" name="Receiver mode + HAC"
+           tx-path="device_in_voice_hac_handset_mic"
+           rx-path="device_out_voice_hac_handset" />
+  <usecase type="telephony" name="Speaker mode"
+           tx-path="device_in_voice_speaker_handset_mic"
+           rx-path="device_out_voice_speaker" />
+  <usecase type="telephony" name="Speaker mode + BT HAC"
+           tx-path="device_in_voice_speaker_bt_hac_handset_mic"
+           rx-path="device_out_voice_bt_hac_speaker" />
+  <usecase type="telephony" name="USB-C dongle mode1 without mic"
+           tx-path="device_in_voice_usb_dongle_handset_mic"
+           rx-path="device_out_voice_usb_dongle_headphone" />
+  <usecase type="telephony" name="USB-C dongle mode1 with mic"
+           tx-path="device_in_voice_usb_dongle_headset_mic"
+           rx-path="device_out_voice_usb_dongle_headset" />
+  <usecase type="telephony" name="USB-C dongle mode2 (Sprint testing only)"
+           tx-path="device_in_voice_usb_dongle_testing_headset_mic"
+           rx-path="device_out_voice_usb_dongle_testing_headset" />
+  <usecase type="telephony" name="USB-C dongle mode3 (Sprint electrical only)"
+           tx-path="device_in_voice_usb_dongle_electrical_headset_mic"
+           rx-path="device_out_voice_usb_dongle_electrical_headset" />
+  <usecase type="telephony" name="USB-C headset (in-box earphone)"
+           tx-path="device_in_voice_usb_headset_mic"
+           rx-path="device_out_voice_usb_headset" />
+  <usecase type="telephony" name="BT_NB (wb=off, nrec=off)"
+           tx-path="device_in_voice_bt_mic"
+           rx-path="device_out_voice_bt_headset" />
+  <usecase type="telephony" name="BT_NB_NREC (wb=off, nrec=on)"
+           tx-path="device_in_voice_bt_nrec_mic"
+           rx-path="device_out_voice_bt_nrec_headset" />
+  <usecase type="telephony" name="BT_WB (wb=on, nrec=off)"
+           tx-path="device_in_voice_bt_wb_mic"
+           rx-path="device_out_voice_bt_wb_headset" />
+  <usecase type="telephony" name="BT_WB_NREC (wb=on, nrec=on)"
+           tx-path="device_in_voice_bt_wb_nrec_mic"
+           rx-path="device_out_voice_bt_wb_nrec_headset" />
+  <usecase type="telephony" name="USB-C dongle (full mode)"
+           tx-path="device_in_voice_usb_tty_full_mic"
+           rx-path="device_out_voice_usb_tty_full" />
+  <usecase type="telephony" name="USB-C dongle (hco mode)"
+           tx-path="device_in_voice_usb_tty_hco_mic"
+           rx-path="device_out_voice_tty_hco_handset" />
+  <usecase type="telephony" name="USB-C dongle (vco mode)"
+           tx-path="device_in_voice_tty_vco_handset_mic"
+           rx-path="device_out_voice_usb_tty_vco" />
+  <usecase type="telephony" name="Receiver mode (Fi Asti)"
+           tx-path="device_in_voice_receiver_fi_handset_mic"
+           rx-path="device_out_voice_fi_handset" />
+  <usecase type="telephony" name="Speaker mode (Fi Asti)"
+           tx-path="device_in_voice_speaker_fi_handset_mic"
+           rx-path="device_out_voice_fi_speaker" />
+  <usecase type="telephony" name="USB-C headset/dongle without mic (Fi Asti)"
+           tx-path="device_in_voice_fi_handset_mic"
+           rx-path="device_out_voice_fi_usb_headphone" />
+  <usecase type="telephony" name="USB-C headset/dongle with mic (Fi Asti)"
+           tx-path="device_in_voice_fi_with_headset_mic"
+           rx-path="device_out_voice_fi_usb_headset" />
+  <usecase type="telephony" name="USB-C headset (in-box) (Fi Asti)"
+           tx-path="device_in_voice_fi_inbox_headset_mic"
+           rx-path="device_out_voice_fi_usb_inbox_headset" />
+  <usecase type="telephony" name="Receiver mode (VoIP)"
+           tx-path="device_in_voice_voip_receiver_handset_mic"
+           rx-path="device_out_voice_voip_handset" />
+  <usecase type="telephony" name="Speaker mode (VoIP)"
+           tx-path="device_in_voice_voip_speaker_handset_mic"
+           rx-path="device_out_voice_voip_speaker" />
+  <usecase type="telephony" name="USB-C headset/dongle without mic"
+           tx-path="device_in_voice_voip_handset_mic"
+           rx-path="device_out_voice_voip_usb_headphone" />
+  <usecase type="telephony" name="USB-C headset/dongle with mic"
+           tx-path="device_in_voice_voip_usb_headset_mic"
+           rx-path="device_out_voice_voip_usb_mic_headphone" />
+  <usecase type="telephony" name="USB-C headset (in-box)"
+           tx-path="device_in_voice_voip_usb_inbox_headset_mic"
+           rx-path="device_out_voice_voip_usb_inbox_headphone" />
+  <usecase type="playback" name="Earpiece playback (Handset mode)"
+           rx-path="device_out_handset" />
+  <usecase type="playback" name="Stereo speaker playback (Speaker mode)"
+           rx-path="device_out_stereo_speaker" />
+  <usecase type="playback" name="Mono speaker playback (Bottom speaker only)"
+           rx-path="device_out_mono_speaker" />
+  <usecase type="playback" name="USB-C headset (BlackBird)"
+           rx-path="device_out_usb_blackbird_headset" />
+  <usecase type="playback" name="USB-C headset (Others)"
+           rx-path="device_out_usb_others_headset" />
+  <usecase type="playback" name="USB-C dongle with 4 pin headset"
+           rx-path="device_out_usb_4_pin_headset" />
+  <usecase type="playback" name="USB-C dongle with 3 pin headphone"
+           rx-path="device_out_usb_headphone" />
+  <usecase type="playback" name="USB-C headset/dongle (Bottom speaker only)"
+           rx-path="device_out_usb_others_headset_headphone" />
+  <usecase type="playback" name="A2DP"
+           rx-path="device_out_bt_a2dp" />
+  <usecase type="record" name="Voice note with main mic (Google Keep and 3rd party)"
+           tx-path="device_in_handset_mic" />
+  <usecase type="record" name="SoloTester with dual mic (3rd party)"
+           tx-path="device_in_handset_dual_mic" />
+  <usecase type="record" name="SoloTester with tri mic (3rd party)"
+           tx-path="device_in_handset_tri_mic" />
+  <usecase type="record" name="Meetings and lectures with rear mic"
+           tx-path="device_in_handset_rear_mic" />
+  <usecase type="record" name="Music and raw sound"
+           tx-path="device_in_handset_rec_mic" />
+  <usecase type="record" name="Voice wakeup Hotword (OK Google)"
+           tx-path="device_in_wakeup_handset_mic" />
+  <usecase type="record" name="Voice wakeup Hotword barge-in (OK Google)"
+           tx-path="device_in_wakeup_barge_in_handset_mic" />
+  <usecase type="record" name="USB-C headset/dongle mic"
+           tx-path="device_in_usb_headset_dongle_mic" />
+  <usecase type="record" name="Three mic enabled (Back Cam, Landscape)"
+           tx-path="device_in_back_cam_land_tri_mic" />
+  <usecase type="record" name="Three mic enabled (Back Cam, Invert-Landscape)"
+           tx-path="device_in_back_cam_invert_land_tri_mic" />
+  <usecase type="record" name="Three mic enabled (Back Cam, Portrait)"
+           tx-path="device_in_back_cam_port_tri_mic" />
+  <usecase type="record" name="Three mic enabled (Selfie, Landscape)"
+           tx-path="device_in_selfie_land_tri_mic" />
+  <usecase type="record" name="Three mic enabled (Selfie, Invert-Landscape)"
+           tx-path="device_in_selfie_invert_land_tri_mic" />
+  <usecase type="record" name="Three mic enabled (Selfie, Portrait)"
+           tx-path="device_in_selfie_port_tri_mic" />
+  <usecase type="record" name="USB-C headset mic"
+           tx-path="device_in_usb_headset_mic" />
+  <usecase type="record" name="Voice recognition"
+           tx-path="device_in_voice_handset_rec_mic" />
+  <usecase type="record" name="USB-C headset/dongle voice recognition"
+           tx-path="device_in_usb_headset_voice_mic" />
+  <usecase type="record" name="Unprocessed record (channel count = 1)"
+           tx-path="device_in_unprocessed_handset_mic" />
+  <usecase type="record" name="Unprocessed record (channel count = 2)"
+           tx-path="device_in_unprocessed_handset_dual_mic" />
+  <usecase type="record" name="Unprocessed record (channel count = 3)"
+           tx-path="device_in_unprocessed_handset_tri_mic" />
+  <usecase type="record" name="Unprocessed record (channel count = 4)"
+           tx-path="device_in_unprocessed_handset_quad_mic" />
+  <usecase type="record" name="USB-C headset mic (BlackBird + Others)"
+           tx-path="device_in_unprocessed_usb_headset_mic" />
+  <usecase type="record" name="USB-C Dongle with 4 pin headset"
+           tx-path="device_in_unprocessed_usb_4_pin_headset_mic" />
+  <usecase type="record" name="BT SCO"
+           tx-path="device_in_bt_sco_mic" />
+  <usecase type="hotword" name="Default" tx-path="device_in_hotword" />
+
+  <!--
+    Tx/Rx paths (14 bits)
+  -->
+  <path value="0" id="device_in_hotword" mixer-ref="handset_mic" />
+  <path value="1" id="device_in_voice_handset_mic" mixer-ref="voice_mic" />
+  <path value="2" id="device_out_voice_handset" mixer-ref="voice_handset" />
+  <path value="3" id="device_in_voice_hac_handset_mic" mixer-ref="voice_mic" />
+  <path value="4" id="device_out_voice_hac_handset" mixer-ref="voice_handset" />
+  <path value="5" id="device_in_voice_speaker_handset_mic" mixer-ref="voice_speaker_mic" />
+  <path value="6" id="device_out_voice_speaker" mixer-ref="voice_speaker" />
+  <path value="7" id="device_in_voice_speaker_bt_hac_handset_mic" mixer-ref="bt_mic" />
+  <path value="8" id="device_out_voice_bt_hac_speaker" mixer-ref="bt_speaker" />
+  <path value="9" id="device_in_voice_usb_dongle_handset_mic" mixer-ref="voice_mic" />
+  <path value="10" id="device_out_voice_usb_dongle_headphone" mixer-ref="usb_headphone" />
+  <path value="11" id="device_in_voice_usb_dongle_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="12" id="device_out_voice_usb_dongle_headset" mixer-ref="usb_headset" />
+  <path value="13" id="device_in_voice_usb_dongle_testing_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="14" id="device_out_voice_usb_dongle_testing_headset" mixer-ref="usb_headset" />
+  <path value="15" id="device_in_voice_usb_dongle_electrical_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="16" id="device_out_voice_usb_dongle_electrical_headset" mixer-ref="usb_headset" />
+  <path value="17" id="device_in_voice_usb_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="18" id="device_out_voice_usb_headset" mixer-ref="usb_headset" />
+  <path value="19" id="device_in_voice_bt_mic" mixer-ref="bt_mic" />
+  <path value="20" id="device_out_voice_bt_headset" mixer-ref="bt_headset" />
+  <path value="21" id="device_in_voice_bt_nrec_mic" mixer-ref="bt_mic" />
+  <path value="22" id="device_out_voice_bt_nrec_headset" mixer-ref="bt_headset" />
+  <path value="23" id="device_in_voice_bt_wb_mic" mixer-ref="bt_mic" />
+  <path value="24" id="device_out_voice_bt_wb_headset" mixer-ref="bt_headset" />
+  <path value="25" id="device_in_voice_bt_wb_nrec_mic" mixer-ref="bt_mic" />
+  <path value="26" id="device_out_voice_bt_wb_nrec_headset" mixer-ref="bt_headset" />
+  <path value="27" id="device_in_voice_usb_tty_full_mic" mixer-ref="voice_tty_full_headset_mic" />
+  <path value="28" id="device_out_voice_usb_tty_full" mixer-ref="voice_tty_full_headphone" />
+  <path value="29" id="device_in_voice_usb_tty_hco_mic" mixer-ref="voice_tty_hco_headset_mic" />
+  <path value="30" id="device_out_voice_tty_hco_handset" mixer-ref="voice_tty_hco_handset" />
+  <path value="31" id="device_in_voice_tty_vco_handset_mic" mixer-ref="voice_tty_vco_headset_mic" />
+  <path value="32" id="device_out_voice_usb_tty_vco" mixer-ref="voice_tty_vco_headphone" />
+  <path value="33" id="device_in_voice_receiver_fi_handset_mic" mixer-ref="voice_mic" />
+  <path value="34" id="device_out_voice_fi_handset" mixer-ref="voice_handset" />
+  <path value="35" id="device_in_voice_speaker_fi_handset_mic" mixer-ref="voice_mic" />
+  <path value="36" id="device_out_voice_fi_speaker" mixer-ref="voice_speaker" />
+  <path value="37" id="device_in_voice_fi_handset_mic" mixer-ref="voice_mic" />
+  <path value="38" id="device_out_voice_fi_usb_headphone" mixer-ref="usb_headphone" />
+  <path value="39" id="device_in_voice_fi_with_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="40" id="device_out_voice_fi_usb_headset" mixer-ref="usb_headset" />
+  <path value="41" id="device_in_voice_fi_inbox_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="42" id="device_out_voice_fi_usb_inbox_headset" mixer-ref="usb_headset" />
+  <path value="43" id="device_in_voice_voip_receiver_handset_mic" mixer-ref="voice_mic" />
+  <path value="44" id="device_out_voice_voip_handset" mixer-ref="voice_handset" />
+  <path value="45" id="device_in_voice_voip_speaker_handset_mic" mixer-ref="voice_mic" />
+  <path value="46" id="device_out_voice_voip_speaker" mixer-ref="voice_handset" />
+  <path value="47" id="device_in_voice_voip_handset_mic" mixer-ref="voice_mic" />
+  <path value="48" id="device_out_voice_voip_usb_headphone" mixer-ref="usb_headphone" />
+  <path value="49" id="device_in_voice_voip_usb_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="50" id="device_out_voice_voip_usb_mic_headphone" mixer-ref="usb_headphone" />
+  <path value="51" id="device_in_voice_voip_usb_inbox_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="52" id="device_out_voice_voip_usb_inbox_headphone" mixer-ref="usb_headphone" />
+  <path value="53" id="device_out_handset" mixer-ref="voice_handset" />
+  <path value="54" id="device_out_stereo_speaker" mixer-ref="voice_speaker" />
+  <path value="55" id="device_out_mono_speaker" mixer-ref="voice_speaker" />
+  <path value="56" id="device_out_usb_blackbird_headset" mixer-ref="usb_headset" />
+  <path value="57" id="device_out_usb_others_headset" mixer-ref="usb_headset" />
+  <path value="58" id="device_out_usb_4_pin_headset" mixer-ref="usb_headset" />
+  <path value="59" id="device_out_usb_headphone" mixer-ref="usb_headphone" />
+  <path value="60" id="device_out_usb_others_headset_headphone" mixer-ref="usb_headset" />
+  <path value="61" id="device_out_bt_a2dp" mixer-ref="bt_speaker" />
+  <path value="62" id="device_in_handset_mic" mixer-ref="handset_mic" />
+  <path value="63" id="device_in_handset_dual_mic" mixer-ref="handset_stereo_mic" />
+  <path value="64" id="device_in_handset_tri_mic" mixer-ref="handset_tri_mic" />
+  <path value="65" id="device_in_handset_rear_mic" mixer-ref="camcorder_mic" />
+  <path value="66" id="device_in_handset_rec_mic" mixer-ref="rec_mic" />
+  <path value="67" id="device_in_wakeup_handset_mic" mixer-ref="handset_mic" />
+  <path value="68" id="device_in_wakeup_barge_in_handset_mic" mixer-ref="handset_mic" />
+  <path value="69" id="device_in_usb_headset_dongle_mic" mixer-ref="usb_headset_mic" />
+  <path value="70" id="device_in_back_cam_land_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="71" id="device_in_back_cam_invert_land_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="72" id="device_in_back_cam_port_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="73" id="device_in_selfie_land_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="74" id="device_in_selfie_invert_land_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="75" id="device_in_selfie_port_tri_mic" mixer-ref="camcorder_mic" />
+  <path value="76" id="device_in_usb_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="77" id="device_in_voice_handset_rec_mic" mixer-ref="rec_mic" />
+  <path value="78" id="device_in_usb_headset_voice_mic" mixer-ref="usb_headset_mic" />
+  <path value="79" id="device_in_unprocessed_handset_mic" mixer-ref="unprocessed_handset_mic" />
+  <path value="80" id="device_in_unprocessed_handset_dual_mic" mixer-ref="unprocessed_handset_stereo_mic" />
+  <path value="81" id="device_in_unprocessed_handset_tri_mic" mixer-ref="unprocessed_handset_tri_mic" />
+  <path value="82" id="device_in_unprocessed_handset_quad_mic" mixer-ref="unprocessed_handset_quad_mic" />
+  <path value="83" id="device_in_unprocessed_usb_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="84" id="device_in_unprocessed_usb_4_pin_headset_mic" mixer-ref="usb_headset_mic" />
+  <path value="85" id="device_in_bt_sco_mic" mixer-ref="bt_mic" />
+
+  <!--
+    Mixer
+  -->
+  <mixer id="voice_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="voice_handset">
+    <hardware-ref node="handset" />
+  </mixer>
+
+  <mixer id="voice_speaker_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="voice_speaker">
+    <hardware-ref node="speaker" />
+  </mixer>
+
+  <mixer id="bt_mic">
+    <hardware-ref node="bt_microphone" />
+  </mixer>
+
+  <mixer id="bt_speaker">
+    <hardware-ref node="bt_speaker" />
+  </mixer>
+
+  <mixer id="bt_headset">
+    <hardware-ref node="bt_headset" />
+  </mixer>
+
+  <mixer id="usb_speaker">
+    <hardware-ref node="usb_headphone" />
+  </mixer>
+
+  <mixer id="usb_headset_mic">
+    <hardware-ref node="usb_headset_mic" />
+  </mixer>
+
+  <mixer id="usb_headset">
+    <hardware-ref node="usb_headset" />
+  </mixer>
+
+  <mixer id="usb_headphone">
+    <hardware-ref node="usb_headphone" />
+  </mixer>
+
+  <mixer id="voice_tty_full_headset_mic">
+    <hardware-ref node="usb_headset_mic" />
+  </mixer>
+
+  <mixer id="voice_tty_full_headphone">
+    <hardware-ref node="usb_headphone" />
+  </mixer>
+
+  <mixer id="voice_tty_hco_headset_mic">
+    <hardware-ref node="usb_headset_mic" />
+  </mixer>
+
+  <mixer id="voice_tty_hco_handset">
+    <hardware-ref node="handset" />
+  </mixer>
+
+  <mixer id="voice_tty_vco_headset_mic">
+    <hardware-ref node="usb_headset_mic" />
+  </mixer>
+
+  <mixer id="voice_tty_vco_headphone">
+    <hardware-ref node="usb_headphone" />
+  </mixer>
+
+  <mixer id="handset_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="handset_stereo_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="handset_tri_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="camcorder_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="rec_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="unprocessed_handset_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="unprocessed_handset_stereo_mic">
+    <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="unprocessed_handset_tri_mic">
+   <hardware-ref node="microphone" />
+  </mixer>
+
+  <mixer id="unprocessed_handset_quad_mic">
+   <hardware-ref node="microphone" />
+  </mixer>
+
+  <!--
+    Hardware
+  -->
+  <hardware id="handset" name="Handset" />
+  <hardware id="speaker" name="Speaker" />
+  <hardware id="headphone" name="Headphone" />
+  <hardware id="microphone" name="Microphone" />
+  <hardware id="bt_speaker" name="BT Speaker" />
+  <hardware id="bt_microphone" name="BT Microphone" />
+  <hardware id="bt_headset" name="BT Headset" />
+  <hardware id="usb_headset_mic" name="USB-C Headset Microphone" />
+  <hardware id="usb_headset" name="USB-C Headset" />
+  <hardware id="usb_headphone" name="USB-C Headphone" />
+
+  <!--
+    Carrier (4 bits)
+  -->
+  <carrier value="0" type="telephony" name="None" />
+  <carrier value="1" type="telephony" name="Generic" />
+  <carrier value="2" type="telephony" name="TMOUS" />
+  <carrier value="3" type="telephony" name="SPRINT" />
+  <carrier value="4" type="telephony" name="USCC" />
+  <carrier value="5" type="telephony" name="VZW" />
+
+  <!--
+    Telephony modes.
+  -->
+  <!-- Network Modes (6 bits) -->
+  <mode value="0" type="network" name="None" />
+  <mode value="1" type="network" name="GSM" />
+  <mode value="2" type="network" name="CDMA" />
+  <mode value="3" type="network" name="WCDMA" />
+  <mode value="4" type="network" name="VOLTE" />
+
+  <!-- Codec Modes (8 bits)-->
+  <mode value="0" type="codec" name="None" />
+  <mode value="1" type="codec" name="NB-13K" />
+  <mode value="2" type="codec" name="SO3" />
+  <mode value="3" type="codec" name="SO68" />
+  <mode value="4" type="codec" name="NB-SO73 (COP1~COP7)" />
+  <mode value="5" type="codec" name="WB-SO73 (COP0)" />
+  <mode value="6" type="codec" name="NB-AMR_NB" />
+  <mode value="7" type="codec" name="EFR" />
+  <mode value="8" type="codec" name="FR" />
+  <mode value="9" type="codec" name="HR" />
+  <mode value="10" type="codec" name="WB-AMR_WB" />
+  <mode value="11" type="codec" name="WB-eAMR" />
+  <mode value="12" type="codec" name="NB-eAMR" />
+  <mode value="13" type="codec" name="SO73-WB" />
+  <mode value="14" type="codec" name="SO73-NB" />
+  <mode value="15" type="codec" name="NB-EVS" />
+  <mode value="16" type="codec" name="16kHz-EVS-WB" />
+  <mode value="17" type="codec" name="16kHz-EVS-NB" />
+  <mode value="18" type="codec" name="32kHz-EVS-SWB" />
+  <mode value="19" type="codec" name="32kHz-EVS-WB" />
+  <mode value="20" type="codec" name="32kHz-EVS-NB" />
+  <mode value="21" type="codec" name="48kHz-EVS-FB" />
+  <mode value="22" type="codec" name="48kHz-EVS-SWB" />
+  <mode value="23" type="codec" name="48kHz-EVS-WB" />
+  <mode value="24" type="codec" name="48kHz-EVS-NB" />
+
+  <!--
+    Band Modes (3 bits)
+      NB  (8000)
+      WB  (16000)
+      SWB (32000)
+      FB  (48000)
+  -->
+  <mode value="1" type="band" name="NB" />
+  <mode value="2" type="band" name="WB" />
+  <mode value="3" type="band" name="SWB" />
+  <mode value="4" type="band" name="FB" />
+
+  <!--
+    Playback modes.
+  -->
+  <!-- Sounds Modes (3 bits) -->
+  <mode value="1" type="sound" name="Low Latency" />
+  <mode value="2" type="sound" name="Ultra Low Latency" />
+  <mode value="3" type="sound" name="DeepBuffer" />
+  <mode value="4" type="sound" name="Compress Offload" />
+
+  <!-- Sample Rate Modes (5 bits) -->
+  <mode value="1" type="rate" name="8000" />
+  <mode value="2" type="rate" name="11025" />
+  <mode value="3" type="rate" name="16000" />
+  <mode value="4" type="rate" name="22050" />
+  <mode value="5" type="rate" name="32000" />
+  <mode value="6" type="rate" name="44100" />
+  <mode value="7" type="rate" name="48000" />
+  <mode value="8" type="rate" name="96000" />
+
+  <!-- (2) Tuning Architecture -->
+  <!--
+    Root node.
+  -->
+  <tuning-tree>
+    <feature-ref node="feature_telephony" />
+    <feature-ref node="feature_playback" />
+    <feature-ref node="feature_record" />
+    <feature-ref node="feature_hotword" />
+  </tuning-tree>
+
+  <!--
+    Feature nodes.
+  -->
+  <feature-node id="feature_telephony" type="telephony" name="Telephony">
+    <category-ref node="category_cellular" />
+    <category-ref node="category_tty" />
+    <category-ref node="category_fi" />
+    <category-ref node="category_voip_ec_ns" />
+  </feature-node>
+
+  <feature-node id="feature_playback" type="playback" name="Playback">
+    <category-ref node="category_sound" />
+  </feature-node>
+
+  <feature-node id="feature_record" type="record" name="Recording">
+    <category-ref node="category_record" />
+    <category-ref node="category_cam" />
+    <category-ref node="category_vr" />
+    <category-ref node="category_unprocessed" />
+  </feature-node>
+
+  <feature-node id="feature_hotword" type="hotword" name="SmartFeature">
+    <category-ref node="category_hotword_default" />
+  </feature-node>
+
+  <!--
+    Category nodes.
+  -->
+  <category-node id="category_cellular" type="telephony" name="Cellular">
+    <usecase-ref node="usecase_telephony_receiver_mode" />
+    <usecase-ref node="usecase_telephony_hac_receiver_mode" />
+    <usecase-ref node="usecase_telephony_speaker_mode" />
+    <usecase-ref node="usecase_telephony_bt_hac_speaker_mode" />
+    <usecase-ref node="usecase_telephony_usb_dongle_mode1_without_mic_mode" />
+    <usecase-ref node="usecase_telephony_usb_dongle_mode1_with_mic_mode" />
+    <usecase-ref node="usecase_telephony_sprint_test_usb_dongle_mode2" />
+    <usecase-ref node="usecase_telephony_sprint_ectrical_usb_dongle_mode3" />
+    <usecase-ref node="usecase_telephony_usb_inbox_earphone_headset" />
+    <usecase-ref node="usecase_telephony_bt_nb" />
+    <usecase-ref node="usecase_telephony_bt_nb_nrec" />
+    <usecase-ref node="usecase_telephony_bt_wb" />
+    <usecase-ref node="usecase_telephony_bt_wb_nrec" />
+  </category-node>
+
+  <category-node id="category_tty" type="telephony" name="TTY">
+    <usecase-ref node="usecase_telephony_usb_dongle_full" />
+    <usecase-ref node="usecase_telephony_usb_dongle_hco" />
+    <usecase-ref node="usecase_telephony_usb_dongle_vco" />
+  </category-node>
+
+  <category-node id="category_fi" type="telephony" name="Google-Fi">
+    <usecase-ref node="usecase_telephony_fi" />
+    <usecase-ref node="usecase_telephony_speaker_fi" />
+    <usecase-ref node="usecase_telephony_fi_usb_headset_without_mic" />
+    <usecase-ref node="usecase_telephony_fi_usb_headset_with_mic" />
+    <usecase-ref node="usecase_telephony_fi_usb_inbox_headset" />
+  </category-node>
+
+  <category-node id="category_voip_ec_ns" type="telephony" name="VoIP EC NS">
+    <usecase-ref node="usecase_telephony_voip_receiver" />
+    <usecase-ref node="usecase_telephony_voip_speaker" />
+    <usecase-ref node="usecase_telephony_voip_without_headset_mic" />
+    <usecase-ref node="usecase_telephony_voip_usb_headset_mic" />
+    <usecase-ref node="usecase_telephony_voip_usb_inbox_headset" />
+    <usecase-ref node="usecase_telephony_voip_bt_nb" />
+    <usecase-ref node="usecase_telephony_voip_bt_nb_nrec" />
+    <usecase-ref node="usecase_telephony_voip_bt_wb" />
+    <usecase-ref node="usecase_telephony_voip_bt_wb_nrec" />
+  </category-node>
+
+  <category-node id="category_sound" type="playback" name="Sound">
+    <usecase-ref node="usecase_playback_earpiece_handset" />
+    <usecase-ref node="usecase_playback_stereo_speaker" />
+    <usecase-ref node="usecase_playback_mono_speaker_bottom_speaker" />
+    <usecase-ref node="usecase_playback_usb_blackbird_headset" />
+    <usecase-ref node="usecase_playback_usb_others_headset" />
+    <usecase-ref node="usecase_playback_usb_dongle_4_pin_headset" />
+    <usecase-ref node="usecase_playback_usb_dongle_3_pin_headphone" />
+    <usecase-ref node="usecase_playback_usb_headset_dongle_bottom_speaker" />
+    <usecase-ref node="usecase_playback_a2dp" />
+  </category-node>
+
+  <category-node id="category_record" type="record" name="Record">
+    <usecase-ref node="usecase_record_voice_note_main_mic" />
+    <usecase-ref node="usecase_record_solotester_dual_mic" />
+    <usecase-ref node="usecase_record_solotester_tri_mic" />
+    <usecase-ref node="usecase_record_meetings_lectures_rear_mic" />
+    <usecase-ref node="usecase_record_music_raw_sound" />
+    <usecase-ref node="usecase_record_voice_wakeup_hotword" />
+    <usecase-ref node="usecase_record_voice_wakeup_hotword_barge-in" />
+    <usecase-ref node="usecase_record_usb_headset_dongle_mic" />
+    <usecase-ref node="usecase_record_bt_sco" />
+  </category-node>
+
+  <category-node id="category_cam" type="record" name="Camcorder">
+    <usecase-ref node="usecase_record_back_cam_land_tri_mic" />
+    <usecase-ref node="usecase_record_back_cam_invert_land_tri_mic" />
+    <usecase-ref node="usecase_record_back_cam_port_tri_mic" />
+    <usecase-ref node="usecase_record_selfie_land_tri_mic" />
+    <usecase-ref node="usecase_record_selfie_invert_land_tri_mic" />
+    <usecase-ref node="usecase_record_selfie_port_tri_mic" />
+    <usecase-ref node="usecase_record_usb_headset_mic" />
+  </category-node>
+
+  <category-node id="category_vr" type="record" name="VR">
+    <usecase-ref node="usecase_record_handset_voice_mic" />
+    <usecase-ref node="usecase_record_usb_headset_voice_mic" />
+  </category-node>
+
+  <category-node id="category_unprocessed" type="record" name="Unprocessed">
+    <usecase-ref node="usecase_record_unprocessed_handset_mic" />
+    <usecase-ref node="usecase_record_unprocessed_handset_dual_mic" />
+    <usecase-ref node="usecase_record_unprocessed_handset_tri_mic" />
+    <usecase-ref node="usecase_record_unprocessed_handset_quad_mic" />
+    <usecase-ref node="usecase_record_unprocessed_usb_blackbird_others_headset_mic" />
+    <usecase-ref node="usecase_record_unprocessed_usb_dongle_4_pin_headset" />
+  </category-node>
+
+  <category-node id="category_hotword_default" type="hotword" name="Default">
+    <usecase-ref node="usecase_hotword_default" />
+  </category-node>
+
+  <!--
+    Usecase nodes.
+  -->
+  <usecase-node id="usecase_telephony_receiver_mode" type="telephony" name="Receiver mode">
+    <carrier-ref node="carrier_generic" />
+    <carrier-ref node="carrier_tmous" />
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_hac_receiver_mode" type="telephony"
+                name="Receiver mode + HAC">
+    <carrier-ref node="carrier_generic" />
+    <carrier-ref node="carrier_tmous" />
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_speaker_mode" type="telephony" name="Speaker mode">
+    <carrier-ref node="carrier_generic" />
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_bt_hac_speaker_mode" type="telephony"
+                name="Speaker mode + BT HAC">
+    <carrier-ref node="carrier_generic" />
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_dongle_mode1_without_mic_mode" type="telephony"
+                name="USB-C dongle mode1 without mic">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_dongle_mode1_with_mic_mode" type="telephony"
+                name="USB-C dongle mode1 with mic">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_sprint_test_usb_dongle_mode2" type="telephony"
+                name="USB-C dongle mode2 (Sprint testing only)">
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_sprint_ectrical_usb_dongle_mode3" type="telephony"
+                name="USB-C dongle mode3 (Sprint electrical only)">
+    <carrier-ref node="carrier_sprint" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_inbox_earphone_headset" type="telephony"
+                name="USB-C headset (in-box earphone)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_bt_nb" type="telephony" name="BT_NB (wb=off, nrec=off)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_bt_nb_nrec" type="telephony"
+                name="BT_NB_NREC (wb=off, nrec=on)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_bt_wb" type="telephony" name="BT_WB (wb=on, nrec=off)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_bt_wb_nrec" type="telephony"
+                name="BT_WB_NREC (wb=on, nrec=on)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_dongle_full" type="telephony"
+                name="USB-C dongle (full mode)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_dongle_hco" type="telephony"
+                name="USB-C dongle (hco mode)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_usb_dongle_vco" type="telephony"
+                name="USB-C dongle (vco mode)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_fi" type="telephony"
+                name="Receiver mode (Fi Asti)">
+    <carrier-ref node="carrier_vzw" />
+    <carrier-ref node="carrier_tmous" />
+    <carrier-ref node="carrier_uscc" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_speaker_fi" type="telephony"
+                name="Speaker mode (Fi Asti)">
+    <carrier-ref node="carrier_vzw" />
+    <carrier-ref node="carrier_tmous" />
+    <carrier-ref node="carrier_uscc" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_fi_usb_headset_without_mic" type="telephony"
+                name="USB-C headset/dongle without mic (Fi Asti)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_fi_usb_headset_with_mic" type="telephony"
+                name="USB-C headset/dongle with mic (Fi Asti)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_fi_usb_inbox_headset" type="telephony"
+                name="USB-C headset (in-box) (Fi Asti)">
+    <carrier-ref node="carrier_generic" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_receiver" type="telephony"
+                name="Receiver mode (VoIP)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_speaker" type="telephony"
+                name="Speaker mode (VoIP)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_without_headset_mic" type="telephony"
+                name="USB-C headset/dongle without mic">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_usb_headset_mic" type="telephony"
+                name="USB-C headset/dongle with mic">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_usb_inbox_headset" type="telephony"
+                name="USB-C headset (in-box)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_bt_nb" type="telephony"
+                name="BT_NB (wb=off, nrec=off)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_bt_nb_nrec" type="telephony"
+                name="BT_NB_NREC (wb=off, nrec=on)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_bt_wb" type="telephony"
+                name="BT_WB (wb=on, nrec=off)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_telephony_voip_bt_wb_nrec" type="telephony"
+                name="BT_WB_NREC (wb=on, nrec=on)">
+    <carrier-ref node="carrier_none" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_earpiece_handset" type="playback"
+                name="Earpiece playback (Handset mode)">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_stereo_speaker" type="playback"
+                name="Stereo speaker playback (Speaker mode)">
+    <mode-ref node="sound_mono_stereo_low_latency" />
+    <mode-ref node="sound_mono_stereo_ultra_low_latency" />
+    <mode-ref node="sound_mono_stereo_deep_buffer" />
+    <mode-ref node="sound_mono_stereo_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_mono_speaker_bottom_speaker" type="playback"
+                name="Mono speaker playback (Bottom speaker only)">
+    <mode-ref node="sound_mono_stereo_low_latency" />
+    <mode-ref node="sound_mono_stereo_ultra_low_latency" />
+    <mode-ref node="sound_mono_stereo_deep_buffer" />
+    <mode-ref node="sound_mono_stereo_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_usb_blackbird_headset" type="playback"
+                name="USB-C headset (BlackBird)">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_usb_others_headset" type="playback"
+                name="USB-C headset (Others)">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_usb_dongle_4_pin_headset" type="playback"
+                name="USB-C dongle with 4 pin headset">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_usb_dongle_3_pin_headphone" type="playback"
+                name="USB-C dongle with 3 pin headphone">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_usb_headset_dongle_bottom_speaker" type="playback"
+                name="USB-C headset/dongle (Bottom speaker only)">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_playback_a2dp" type="playback"
+                name="A2DP">
+    <mode-ref node="sound_low_latency" />
+    <mode-ref node="sound_ultra_low_latency" />
+    <mode-ref node="sound_deep_buffer" />
+    <mode-ref node="sound_compress_offload" />
+  </usecase-node>
+
+  <usecase-node id="usecase_record_voice_note_main_mic" type="record"
+                name="Voice note with main mic (Google Keep and 3rd party)" />
+
+  <usecase-node id="usecase_record_solotester_dual_mic" type="record"
+                name="SoloTester with dual mic (3rd party)" />
+
+  <usecase-node id="usecase_record_solotester_tri_mic" type="record"
+                name="SoloTester with tri mic (3rd party)" />
+
+  <usecase-node id="usecase_record_meetings_lectures_rear_mic" type="record"
+                name="Meetings and lectures with rear mic" />
+
+  <usecase-node id="usecase_record_music_raw_sound" type="record"
+                name="Music and raw sound" />
+
+  <usecase-node id="usecase_record_voice_wakeup_hotword" type="record"
+                name="Voice wakeup Hotword (OK Google)" />
+
+  <usecase-node id="usecase_record_voice_wakeup_hotword_barge-in" type="record"
+                name="Voice wakeup Hotword barge-in (OK Google)" />
+
+  <usecase-node id="usecase_record_usb_headset_dongle_mic" type="record"
+                name="USB-C headset/dongle mic" />
+
+  <usecase-node id="usecase_record_bt_sco" type="record"
+                name="BT SCO" />
+
+  <usecase-node id="usecase_record_back_cam_land_tri_mic" type="record"
+                name="Three mic enabled (Back Cam, Landscape)" />
+
+  <usecase-node id="usecase_record_back_cam_invert_land_tri_mic" type="record"
+                name="Three mic enabled (Back Cam, Invert-Landscape)" />
+
+  <usecase-node id="usecase_record_back_cam_port_tri_mic" type="record"
+                name="Three mic enabled (Back Cam, Portrait)" />
+
+  <usecase-node id="usecase_record_selfie_land_tri_mic" type="record"
+                name="Three mic enabled (Selfie, Landscape)" />
+
+  <usecase-node id="usecase_record_selfie_invert_land_tri_mic" type="record"
+                name="Three mic enabled (Selfie, Invert-Landscape)" />
+
+  <usecase-node id="usecase_record_selfie_port_tri_mic" type="record"
+                name="Three mic enabled (Selfie, Portrait)" />
+
+  <usecase-node id="usecase_record_usb_headset_mic" type="record"
+                name="USB-C headset mic" />
+
+  <usecase-node id="usecase_record_handset_voice_mic" type="record"
+                name="Voice recognition" />
+
+  <usecase-node id="usecase_record_usb_headset_voice_mic" type="record"
+                name="USB-C headset/dongle voice recognition" />
+
+  <usecase-node id="usecase_record_unprocessed_handset_mic" type="record"
+                name="Unprocessed record (channel count = 1)" />
+  <usecase-node id="usecase_record_unprocessed_handset_dual_mic" type="record"
+                name="Unprocessed record (channel count = 2)" />
+  <usecase-node id="usecase_record_unprocessed_handset_tri_mic" type="record"
+                name="Unprocessed record (channel count = 3)" />
+  <usecase-node id="usecase_record_unprocessed_handset_quad_mic" type="record"
+                name="Unprocessed record (channel count = 4)" />
+  <usecase-node id="usecase_record_unprocessed_usb_blackbird_others_headset_mic" type="record"
+                name="USB-C headset mic (BlackBird + Others)" />
+  <usecase-node id="usecase_record_unprocessed_usb_dongle_4_pin_headset" type="record"
+                name="USB-C Dongle with 4 pin headset" />
+  <usecase-node id="usecase_hotword_default" type="hotword" name="Default" />
+
+  <!--
+    Carrier Nodes.
+  -->
+  <carrier-node id="carrier_none" type="telephony" name="None">
+    <mode-ref node="network_none" />
+  </carrier-node>
+
+  <carrier-node id="carrier_generic" type="telephony" name="Generic">
+    <mode-ref node="network_cdma" />
+    <mode-ref node="network_gsm" />
+    <mode-ref node="network_wcdma" />
+    <mode-ref node="network_volte" />
+  </carrier-node>
+
+  <carrier-node id="carrier_tmous" type="telephony" name="TMOUS">
+    <mode-ref node="network_cdma" />
+    <mode-ref node="network_gsm" />
+    <mode-ref node="network_wcdma" />
+    <mode-ref node="network_volte" />
+  </carrier-node>
+
+  <carrier-node id="carrier_sprint" type="telephony" name="SPRINT">
+    <mode-ref node="network_cdma" />
+    <mode-ref node="network_gsm" />
+    <mode-ref node="network_wcdma" />
+    <mode-ref node="network_volte" />
+  </carrier-node>
+
+  <carrier-node id="carrier_uscc" type="telephony" name="USCC">
+    <mode-ref node="network_cdma" />
+    <mode-ref node="network_gsm" />
+    <mode-ref node="network_wcdma" />
+    <mode-ref node="network_volte" />
+  </carrier-node>
+
+  <carrier-node id="carrier_vzw" type="telephony" name="VZW">
+    <mode-ref node="network_cdma" />
+    <mode-ref node="network_gsm" />
+    <mode-ref node="network_wcdma" />
+    <mode-ref node="network_volte" />
+  </carrier-node>
+
+  <!--
+    Modes Nodes.
+  -->
+  <!-- Network Modes -->
+  <mode-node id="network_none" type="network" name="None">
+    <mode-ref node="codec_none" />
+  </mode-node>
+
+  <mode-node id="network_cdma" type="network" name="CDMA">
+    <mode-ref node="codec_nb-13k" />
+    <mode-ref node="codec_so3" />
+    <mode-ref node="codec_so68" />
+    <mode-ref node="codec_nb-so73(cop1~cop7)" />
+    <mode-ref node="codec_wb-so73(cop0)" />
+  </mode-node>
+
+  <mode-node id="network_gsm" type="network" name="GSM">
+    <mode-ref node="codec_nb-amr_nb" />
+    <mode-ref node="codec_efr" />
+    <mode-ref node="codec_fr" />
+    <mode-ref node="codec_hr" />
+    <mode-ref node="codec_wb-amr_wb" />
+    <mode-ref node="codec_wb-eamr" />
+    <mode-ref node="codec_nb-eamr" />
+  </mode-node>
+
+  <mode-node id="network_wcdma" type="network" name="WCDMA">
+    <mode-ref node="codec_nb-amr_nb" />
+    <mode-ref node="codec_wb-amr_wb" />
+    <mode-ref node="codec_wb-eamr" />
+    <mode-ref node="codec_nb-eamr" />
+  </mode-node>
+
+  <mode-node id="network_volte" type="network" name="VOLTE">
+    <mode-ref node="codec_so73-wb" />
+    <mode-ref node="codec_so73-nb" />
+    <mode-ref node="codec_nb-amr_nb" />
+    <mode-ref node="codec_wb-amr_wb" />
+    <mode-ref node="codec_wb-eamr" />
+    <mode-ref node="codec_nb-eamr" />
+    <mode-ref node="codec_nb-evs" />
+    <mode-ref node="codec_16khz-evs-wb" />
+    <mode-ref node="codec_16khz-evs-nb" />
+    <mode-ref node="codec_32khz-evs-swb" />
+    <mode-ref node="codec_32khz-evs-wb" />
+    <mode-ref node="codec_32khz-evs-nb" />
+    <mode-ref node="codec_48khz-evs-fb" />
+    <mode-ref node="codec_48khz-evs-swb" />
+    <mode-ref node="codec_48khz-evs-wb" />
+    <mode-ref node="codec_48khz-evs-nb" />
+  </mode-node>
+
+  <!-- Volcodec Modes -->
+  <mode-node id="codec_none" type="codec" name="None">
+    <mode-ref node="band_wb" />
+    <mode-ref node="band_fb" />
+  </mode-node>
+
+  <mode-node id="codec_nb-13k" type="codec" name="NB-13K">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_so3" type="codec" name="SO3">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_so68" type="codec" name="SO68">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_nb-so73(cop1~cop7)" type="codec" name="NB-SO73 (COP1~COP7)">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_wb-so73(cop0)" type="codec" name="WB-SO73 (COP0)">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_nb-amr_nb" type="codec" name="NB-AMR_NB">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_efr" type="codec" name="EFR">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_fr" type="codec" name="FR">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_hr" type="codec" name="HR">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_wb-amr_wb" type="codec" name="WB-AMR_WB">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_wb-eamr" type="codec" name="WB-eAMR">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_nb-eamr" type="codec" name="NB-eAMR">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_so73-wb" type="codec" name="SO73-WB">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_so73-nb" type="codec" name="SO73-NB">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_nb-evs" type="codec" name="NB-EVS">
+    <mode-ref node="band_nb" />
+  </mode-node>
+
+  <mode-node id="codec_16khz-evs-wb" type="codec" name="16kHz-EVS-WB">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_16khz-evs-nb" type="codec" name="16kHz-EVS-NB">
+    <mode-ref node="band_wb" />
+  </mode-node>
+
+  <mode-node id="codec_32khz-evs-swb" type="codec" name="32kHz-EVS-SWB">
+    <mode-ref node="band_swb" />
+  </mode-node>
+
+  <mode-node id="codec_32khz-evs-wb" type="codec" name="32kHz-EVS-WB">
+    <mode-ref node="band_swb" />
+  </mode-node>
+
+  <mode-node id="codec_32khz-evs-nb" type="codec" name="32kHz-EVS-NB">
+    <mode-ref node="band_swb" />
+  </mode-node>
+
+  <mode-node id="codec_48khz-evs-fb" type="codec" name="48kHz-EVS-FB">
+    <mode-ref node="band_fb" />
+  </mode-node>
+
+  <mode-node id="codec_48khz-evs-swb" type="codec" name="48kHz-EVS-SWB">
+    <mode-ref node="band_fb" />
+  </mode-node>
+
+  <mode-node id="codec_48khz-evs-wb" type="codec" name="48kHz-EVS-WB">
+    <mode-ref node="band_fb" />
+  </mode-node>
+
+  <mode-node id="codec_48khz-evs-nb" type="codec" name="48kHz-EVS-NB">
+    <mode-ref node="band_fb" />
+  </mode-node>
+
+  <!-- Band Modes -->
+  <mode-node id="band_swb" type="band" name="SWB" />
+  <mode-node id="band_fb" type="band" name="FB" />
+  <mode-node id="band_nb" type="band" name="NB" />
+  <mode-node id="band_wb" type="band" name="WB" />
+
+  <!-- Sounds Modes -->
+  <mode-node id="sound_low_latency" type="sound" name="Low Latency">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+  </mode-node>
+
+  <mode-node id="sound_ultra_low_latency" type="sound" name="Ultra Low Latency">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+  </mode-node>
+
+  <mode-node id="sound_deep_buffer" type="sound" name="DeepBuffer">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+  </mode-node>
+
+  <mode-node id="sound_compress_offload" type="sound" name="Compress Offload">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+  </mode-node>
+
+  <mode-node id="sound_mono_stereo_low_latency" type="sound" name="Low Latency">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+    <mode-ref node="rate_96000" />
+  </mode-node>
+
+  <mode-node id="sound_mono_stereo_ultra_low_latency" type="sound" name="Ultra Low Latency">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+    <mode-ref node="rate_96000" />
+  </mode-node>
+
+  <mode-node id="sound_mono_stereo_deep_buffer" type="sound" name="DeepBuffer">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+    <mode-ref node="rate_96000" />
+  </mode-node>
+
+  <mode-node id="sound_mono_stereo_compress_offload" type="sound" name="Compress Offload">
+    <mode-ref node="rate_8000" />
+    <mode-ref node="rate_11025" />
+    <mode-ref node="rate_16000" />
+    <mode-ref node="rate_22050" />
+    <mode-ref node="rate_32000" />
+    <mode-ref node="rate_44100" />
+    <mode-ref node="rate_48000" />
+    <mode-ref node="rate_96000" />
+  </mode-node>
+
+  <!-- Sample Rate Modes -->
+  <mode-node id="rate_8000" type="rate" name="8000" />
+  <mode-node id="rate_11025" type="rate" name="11025" />
+  <mode-node id="rate_16000" type="rate" name="16000" />
+  <mode-node id="rate_22050" type="rate" name="22050" />
+  <mode-node id="rate_32000" type="rate" name="32000" />
+  <mode-node id="rate_44100" type="rate" name="44100" />
+  <mode-node id="rate_48000" type="rate" name="48000" />
+  <mode-node id="rate_96000" type="rate" name="96000" />
+
+</constraints>
diff --git a/audio/felix/tuning/fortemedia/BLUETOOTH.dat b/audio/felix/tuning/fortemedia/BLUETOOTH.dat
new file mode 100644
index 0000000..722b835
Binary files /dev/null and b/audio/felix/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/felix/tuning/fortemedia/BLUETOOTH.mods b/audio/felix/tuning/fortemedia/BLUETOOTH.mods
new file mode 100644
index 0000000..21cd874
--- /dev/null
+++ b/audio/felix/tuning/fortemedia/BLUETOOTH.mods
@@ -0,0 +1,36818 @@
+#PLATFORM_NAME  gChip
+#EXPORT_FLAG  BLUETOOTH
+#SINGLE_API_VER  1.1.6
+#SAVE_TIME  2021-08-20 16:32:53
+
+#CASE_NAME  BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0000    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x728A    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0028    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0640    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0640    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0640    //TX_OUT_ENER_S_TH_NOISY
+387    0x0190    //TX_OUT_ENER_TH_NOISE
+388    0x07D0    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x0800    //TX_RHO_UPB
+415    0x0B40    //TX_N_HOLD_HS
+416    0x005A    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x4000    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0000    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1800    //TX_MIN_EQ_RE_EST_7
+160    0x1800    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x2000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x157C    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0012    //TX_NS_LVL_CTRL_1
+283    0x0017    //TX_NS_LVL_CTRL_2
+284    0x0015    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000F    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x1000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x2400    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x1000    //TX_A_POST_FILT_S_4
+319    0x3000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x3000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7900    //TX_LAMBDA_PFILT_S_1
+341    0x7400    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7000    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0400    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5528    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5858    //TX_FDEQ_GAIN_0
+568    0x5850    //TX_FDEQ_GAIN_1
+569    0x5050    //TX_FDEQ_GAIN_2
+570    0x5048    //TX_FDEQ_GAIN_3
+571    0x3C48    //TX_FDEQ_GAIN_4
+572    0x3C48    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4842    //TX_FDEQ_GAIN_7
+575    0x3030    //TX_FDEQ_GAIN_8
+576    0x3030    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D08    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4B4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D08    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C08    //TX_PREEQ_BIN_MIC1_2
+693    0x0700    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x7800    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6800    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x07D0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0800    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0032    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x017E    //TX_NOISE_TH_1
+371    0x0230    //TX_NOISE_TH_2
+372    0x3492    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x55B8    //TX_NOISE_TH_5
+375    0x49E6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5050    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x5050    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x3C36    //TX_FDEQ_GAIN_10
+578    0x3A3A    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x5E64    //TX_PREEQ_GAIN_MIC0_12
+630    0x6464    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1104    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x0700    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x6590    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x003C    //TX_NS_LVL_CTRL_2
+284    0x0024    //TX_NS_LVL_CTRL_3
+285    0x003C    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x1400    //TX_SNRI_SUP_1
+302    0x1400    //TX_SNRI_SUP_2
+303    0x1400    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x7C00    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x6000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7D00    //TX_LAMBDA_PFILT_S_1
+341    0x7D00    //TX_LAMBDA_PFILT_S_2
+342    0x7D00    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x484A    //TX_FDEQ_GAIN_5
+573    0x4E5E    //TX_FDEQ_GAIN_6
+574    0x5C4C    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x4448    //TX_FDEQ_GAIN_10
+578    0x4850    //TX_FDEQ_GAIN_11
+579    0x5C6A    //TX_FDEQ_GAIN_12
+580    0x5A84    //TX_FDEQ_GAIN_13
+581    0x7880    //TX_FDEQ_GAIN_14
+582    0x7F7F    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x6474    //TX_PREEQ_GAIN_MIC0_12
+630    0x7870    //TX_PREEQ_GAIN_MIC0_13
+631    0x5C48    //TX_PREEQ_GAIN_MIC0_14
+632    0x383C    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1719    //TX_PREEQ_BIN_MIC0_11
+653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x070F    //TX_PREEQ_BIN_MIC1_8
+699    0x1F08    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0920    //TX_PREEQ_BIN_MIC1_11
+702    0x2020    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0xF200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x4B7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0A98    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A13    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A13    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x286A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A13    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A13    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x286A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/felix/tuning/fortemedia/HANDSET.dat b/audio/felix/tuning/fortemedia/HANDSET.dat
new file mode 100644
index 0000000..9f6bea4
Binary files /dev/null and b/audio/felix/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/felix/tuning/fortemedia/HANDSET.mods b/audio/felix/tuning/fortemedia/HANDSET.mods
new file mode 100644
index 0000000..308f409
--- /dev/null
+++ b/audio/felix/tuning/fortemedia/HANDSET.mods
@@ -0,0 +1,33312 @@
+#PLATFORM_NAME  gChip
+#EXPORT_FLAG  HANDSET
+#SINGLE_API_VER  1.1.6
+#SAVE_TIME  2021-10-21 12:03:00
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B56    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0001    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x695E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B5E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0001    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x695E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B76    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0001    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x695E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0040    //TX_MIN_EQ_RE_EST_0
+153    0x0040    //TX_MIN_EQ_RE_EST_1
+154    0x0040    //TX_MIN_EQ_RE_EST_2
+155    0x0040    //TX_MIN_EQ_RE_EST_3
+156    0x0040    //TX_MIN_EQ_RE_EST_4
+157    0x0040    //TX_MIN_EQ_RE_EST_5
+158    0x0040    //TX_MIN_EQ_RE_EST_6
+159    0x0040    //TX_MIN_EQ_RE_EST_7
+160    0x0040    //TX_MIN_EQ_RE_EST_8
+161    0x0040    //TX_MIN_EQ_RE_EST_9
+162    0x0040    //TX_MIN_EQ_RE_EST_10
+163    0x0040    //TX_MIN_EQ_RE_EST_11
+164    0x0040    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B00    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x01A0    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x3000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x3000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x001B    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0017    //TX_NS_LVL_CTRL_4
+286    0x0019    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x2000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x7FFF    //TX_B_POST_FILT_4
+327    0x7FFF    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7200    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7400    //TX_LAMBDA_PFILT_S_4
+344    0x7200    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2710    //TX_NOISE_TH_3
+373    0x1B58    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0640    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0640    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4E    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443A    //TX_FDEQ_GAIN_5
+573    0x3E42    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3434    //TX_FDEQ_GAIN_8
+576    0x3040    //TX_FDEQ_GAIN_9
+577    0x4040    //TX_FDEQ_GAIN_10
+578    0x4040    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0302    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F10    //TX_FDEQ_BIN_8
+600    0x100F    //TX_FDEQ_BIN_9
+601    0x0101    //TX_FDEQ_BIN_10
+602    0x0101    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x484A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C50    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D08    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0004    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0027    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0070    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x011E    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0008    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x01A0    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x5000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x001C    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x001C    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x001A    //TX_NS_LVL_CTRL_5
+287    0x001E    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2E90    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4E50    //TX_FDEQ_GAIN_3
+571    0x4C48    //TX_FDEQ_GAIN_4
+572    0x4840    //TX_FDEQ_GAIN_5
+573    0x4850    //TX_FDEQ_GAIN_6
+574    0x5050    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4850    //TX_FDEQ_GAIN_10
+578    0x5860    //TX_FDEQ_GAIN_11
+579    0x5C60    //TX_FDEQ_GAIN_12
+580    0x6070    //TX_FDEQ_GAIN_13
+581    0x6A70    //TX_FDEQ_GAIN_14
+582    0x8490    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F0B    //TX_FDEQ_BIN_8
+600    0x190F    //TX_FDEQ_BIN_9
+601    0x1212    //TX_FDEQ_BIN_10
+602    0x0D2B    //TX_FDEQ_BIN_11
+603    0x0906    //TX_FDEQ_BIN_12
+604    0x0101    //TX_FDEQ_BIN_13
+605    0x0101    //TX_FDEQ_BIN_14
+606    0x0101    //TX_FDEQ_BIN_15
+607    0x0101    //TX_FDEQ_BIN_16
+608    0x0101    //TX_FDEQ_BIN_17
+609    0x0101    //TX_FDEQ_BIN_18
+610    0x0101    //TX_FDEQ_BIN_19
+611    0x0101    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x3448    //TX_PREEQ_GAIN_MIC1_13
+680    0x3848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1908    //TX_PREEQ_BIN_MIC1_11
+702    0x110C    //TX_PREEQ_BIN_MIC1_12
+703    0x0C02    //TX_PREEQ_BIN_MIC1_13
+704    0x0A00    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x1000    //RX_LMT_THRD
+37    0x7FDF    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0049    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C4    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x013B    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0008    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4E5C    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5A56    //RX_FDEQ_GAIN_4
+44    0x565C    //RX_FDEQ_GAIN_5
+45    0x626C    //RX_FDEQ_GAIN_6
+46    0x7A84    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x002C    //TX_NS_LVL_CTRL_2
+284    0x0020    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0190    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5DC0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x5DC0    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x984E    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4C    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4240    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4840    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4E4C    //TX_FDEQ_GAIN_10
+578    0x5A60    //TX_FDEQ_GAIN_11
+579    0x6262    //TX_FDEQ_GAIN_12
+580    0x5A3C    //TX_FDEQ_GAIN_13
+581    0x5656    //TX_FDEQ_GAIN_14
+582    0x585E    //TX_FDEQ_GAIN_15
+583    0x6698    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0201    //TX_FDEQ_BIN_0
+592    0x0105    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0509    //TX_FDEQ_BIN_7
+599    0x0E09    //TX_FDEQ_BIN_8
+600    0x150A    //TX_FDEQ_BIN_9
+601    0x071E    //TX_FDEQ_BIN_10
+602    0x152B    //TX_FDEQ_BIN_11
+603    0x0617    //TX_FDEQ_BIN_12
+604    0x3226    //TX_FDEQ_BIN_13
+605    0x190A    //TX_FDEQ_BIN_14
+606    0x0A0A    //TX_FDEQ_BIN_15
+607    0x0A0A    //TX_FDEQ_BIN_16
+608    0x0A0A    //TX_FDEQ_BIN_17
+609    0x0A0A    //TX_FDEQ_BIN_18
+610    0x0A0A    //TX_FDEQ_BIN_19
+611    0x0A0A    //TX_FDEQ_BIN_20
+612    0x0A0B    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x110C    //TX_PREEQ_BIN_MIC0_6
+648    0x0A04    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0C    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4834    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x5848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1508    //TX_PREEQ_BIN_MIC1_11
+702    0x1D0A    //TX_PREEQ_BIN_MIC1_12
+703    0x040A    //TX_PREEQ_BIN_MIC1_13
+704    0x0A21    //TX_PREEQ_BIN_MIC1_14
+705    0x2890    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05D3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0028    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0044    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x006F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B0    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x011C    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D9    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5458    //RX_FDEQ_GAIN_2
+42    0x5658    //RX_FDEQ_GAIN_3
+43    0x5452    //RX_FDEQ_GAIN_4
+44    0x525A    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4A4A    //RX_FDEQ_GAIN_17
+57    0x585A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0103    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0001    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x695E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0040    //TX_MIN_EQ_RE_EST_0
+153    0x0040    //TX_MIN_EQ_RE_EST_1
+154    0x0040    //TX_MIN_EQ_RE_EST_2
+155    0x0040    //TX_MIN_EQ_RE_EST_3
+156    0x0040    //TX_MIN_EQ_RE_EST_4
+157    0x0040    //TX_MIN_EQ_RE_EST_5
+158    0x0040    //TX_MIN_EQ_RE_EST_6
+159    0x0040    //TX_MIN_EQ_RE_EST_7
+160    0x0040    //TX_MIN_EQ_RE_EST_8
+161    0x0040    //TX_MIN_EQ_RE_EST_9
+162    0x0040    //TX_MIN_EQ_RE_EST_10
+163    0x0040    //TX_MIN_EQ_RE_EST_11
+164    0x0040    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B00    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x01A0    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x3000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x3000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x001B    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0017    //TX_NS_LVL_CTRL_4
+286    0x0019    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x2000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x7FFF    //TX_B_POST_FILT_4
+327    0x7FFF    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7200    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7400    //TX_LAMBDA_PFILT_S_4
+344    0x7200    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2710    //TX_NOISE_TH_3
+373    0x1B58    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0640    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0640    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4E    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443A    //TX_FDEQ_GAIN_5
+573    0x3E42    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3434    //TX_FDEQ_GAIN_8
+576    0x3040    //TX_FDEQ_GAIN_9
+577    0x4040    //TX_FDEQ_GAIN_10
+578    0x4040    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0302    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F10    //TX_FDEQ_BIN_8
+600    0x100F    //TX_FDEQ_BIN_9
+601    0x0101    //TX_FDEQ_BIN_10
+602    0x0101    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x484A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C50    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D08    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0004    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x01A0    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x5000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x001C    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x001C    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x001A    //TX_NS_LVL_CTRL_5
+287    0x001E    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2E90    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4E50    //TX_FDEQ_GAIN_3
+571    0x4C48    //TX_FDEQ_GAIN_4
+572    0x4840    //TX_FDEQ_GAIN_5
+573    0x4850    //TX_FDEQ_GAIN_6
+574    0x5050    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4850    //TX_FDEQ_GAIN_10
+578    0x5860    //TX_FDEQ_GAIN_11
+579    0x5C60    //TX_FDEQ_GAIN_12
+580    0x6070    //TX_FDEQ_GAIN_13
+581    0x6A70    //TX_FDEQ_GAIN_14
+582    0x8490    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F0B    //TX_FDEQ_BIN_8
+600    0x190F    //TX_FDEQ_BIN_9
+601    0x1212    //TX_FDEQ_BIN_10
+602    0x0D2B    //TX_FDEQ_BIN_11
+603    0x0906    //TX_FDEQ_BIN_12
+604    0x0101    //TX_FDEQ_BIN_13
+605    0x0101    //TX_FDEQ_BIN_14
+606    0x0101    //TX_FDEQ_BIN_15
+607    0x0101    //TX_FDEQ_BIN_16
+608    0x0101    //TX_FDEQ_BIN_17
+609    0x0101    //TX_FDEQ_BIN_18
+610    0x0101    //TX_FDEQ_BIN_19
+611    0x0101    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x3448    //TX_PREEQ_GAIN_MIC1_13
+680    0x3848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1908    //TX_PREEQ_BIN_MIC1_11
+702    0x110C    //TX_PREEQ_BIN_MIC1_12
+703    0x0C02    //TX_PREEQ_BIN_MIC1_13
+704    0x0A00    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x002C    //TX_NS_LVL_CTRL_2
+284    0x0020    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0190    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5DC0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x5DC0    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x984E    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4C    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4240    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4840    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4E4C    //TX_FDEQ_GAIN_10
+578    0x5A60    //TX_FDEQ_GAIN_11
+579    0x6262    //TX_FDEQ_GAIN_12
+580    0x5A3C    //TX_FDEQ_GAIN_13
+581    0x5656    //TX_FDEQ_GAIN_14
+582    0x585E    //TX_FDEQ_GAIN_15
+583    0x6698    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0201    //TX_FDEQ_BIN_0
+592    0x0105    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0509    //TX_FDEQ_BIN_7
+599    0x0E09    //TX_FDEQ_BIN_8
+600    0x150A    //TX_FDEQ_BIN_9
+601    0x071E    //TX_FDEQ_BIN_10
+602    0x152B    //TX_FDEQ_BIN_11
+603    0x0617    //TX_FDEQ_BIN_12
+604    0x3226    //TX_FDEQ_BIN_13
+605    0x190A    //TX_FDEQ_BIN_14
+606    0x0A0A    //TX_FDEQ_BIN_15
+607    0x0A0A    //TX_FDEQ_BIN_16
+608    0x0A0A    //TX_FDEQ_BIN_17
+609    0x0A0A    //TX_FDEQ_BIN_18
+610    0x0A0A    //TX_FDEQ_BIN_19
+611    0x0A0A    //TX_FDEQ_BIN_20
+612    0x0A0B    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x110C    //TX_PREEQ_BIN_MIC0_6
+648    0x0A04    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0C    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4834    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x5848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1508    //TX_PREEQ_BIN_MIC1_11
+702    0x1D0A    //TX_PREEQ_BIN_MIC1_12
+703    0x040A    //TX_PREEQ_BIN_MIC1_13
+704    0x0A21    //TX_PREEQ_BIN_MIC1_14
+705    0x2890    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05D3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0040    //TX_MIN_EQ_RE_EST_0
+153    0x0040    //TX_MIN_EQ_RE_EST_1
+154    0x0040    //TX_MIN_EQ_RE_EST_2
+155    0x0040    //TX_MIN_EQ_RE_EST_3
+156    0x0040    //TX_MIN_EQ_RE_EST_4
+157    0x0040    //TX_MIN_EQ_RE_EST_5
+158    0x0040    //TX_MIN_EQ_RE_EST_6
+159    0x0040    //TX_MIN_EQ_RE_EST_7
+160    0x0040    //TX_MIN_EQ_RE_EST_8
+161    0x0040    //TX_MIN_EQ_RE_EST_9
+162    0x0040    //TX_MIN_EQ_RE_EST_10
+163    0x0040    //TX_MIN_EQ_RE_EST_11
+164    0x0040    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B00    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x01A0    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x3000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x3000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x001B    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0017    //TX_NS_LVL_CTRL_4
+286    0x0019    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x2000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x7FFF    //TX_B_POST_FILT_4
+327    0x7FFF    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7200    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7400    //TX_LAMBDA_PFILT_S_4
+344    0x7200    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2710    //TX_NOISE_TH_3
+373    0x1B58    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0640    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0640    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4E    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443A    //TX_FDEQ_GAIN_5
+573    0x3E42    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3434    //TX_FDEQ_GAIN_8
+576    0x3040    //TX_FDEQ_GAIN_9
+577    0x4040    //TX_FDEQ_GAIN_10
+578    0x4040    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0302    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F10    //TX_FDEQ_BIN_8
+600    0x100F    //TX_FDEQ_BIN_9
+601    0x0101    //TX_FDEQ_BIN_10
+602    0x0101    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x484A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C50    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D08    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0004    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0027    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0070    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x011E    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0008    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4C50    //RX_FDEQ_GAIN_1
+41    0x5A64    //RX_FDEQ_GAIN_2
+42    0x605E    //RX_FDEQ_GAIN_3
+43    0x5C54    //RX_FDEQ_GAIN_4
+44    0x504A    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x606E    //RX_FDEQ_GAIN_7
+47    0x746C    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0204    //RX_FDEQ_BIN_0
+64    0x0101    //RX_FDEQ_BIN_1
+65    0x0205    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0105    //RX_FDEQ_BIN_4
+68    0x0A04    //RX_FDEQ_BIN_5
+69    0x070A    //RX_FDEQ_BIN_6
+70    0x070A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0B0A    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x01A0    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x5000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x001C    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x001C    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x001A    //TX_NS_LVL_CTRL_5
+287    0x001E    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2E90    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4E50    //TX_FDEQ_GAIN_3
+571    0x4C48    //TX_FDEQ_GAIN_4
+572    0x4840    //TX_FDEQ_GAIN_5
+573    0x4850    //TX_FDEQ_GAIN_6
+574    0x5050    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4850    //TX_FDEQ_GAIN_10
+578    0x5860    //TX_FDEQ_GAIN_11
+579    0x5C60    //TX_FDEQ_GAIN_12
+580    0x6070    //TX_FDEQ_GAIN_13
+581    0x6A70    //TX_FDEQ_GAIN_14
+582    0x8490    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F0B    //TX_FDEQ_BIN_8
+600    0x190F    //TX_FDEQ_BIN_9
+601    0x1212    //TX_FDEQ_BIN_10
+602    0x0D2B    //TX_FDEQ_BIN_11
+603    0x0906    //TX_FDEQ_BIN_12
+604    0x0101    //TX_FDEQ_BIN_13
+605    0x0101    //TX_FDEQ_BIN_14
+606    0x0101    //TX_FDEQ_BIN_15
+607    0x0101    //TX_FDEQ_BIN_16
+608    0x0101    //TX_FDEQ_BIN_17
+609    0x0101    //TX_FDEQ_BIN_18
+610    0x0101    //TX_FDEQ_BIN_19
+611    0x0101    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x3448    //TX_PREEQ_GAIN_MIC1_13
+680    0x3848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1908    //TX_PREEQ_BIN_MIC1_11
+702    0x110C    //TX_PREEQ_BIN_MIC1_12
+703    0x0C02    //TX_PREEQ_BIN_MIC1_13
+704    0x0A00    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x1000    //RX_LMT_THRD
+37    0x7FDF    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4C57    //RX_FDEQ_GAIN_2
+42    0x5959    //RX_FDEQ_GAIN_3
+43    0x5753    //RX_FDEQ_GAIN_4
+44    0x5359    //RX_FDEQ_GAIN_5
+45    0x616D    //RX_FDEQ_GAIN_6
+46    0x7983    //RX_FDEQ_GAIN_7
+47    0x897E    //RX_FDEQ_GAIN_8
+48    0x665D    //RX_FDEQ_GAIN_9
+49    0x564E    //RX_FDEQ_GAIN_10
+50    0x4855    //RX_FDEQ_GAIN_11
+51    0x555D    //RX_FDEQ_GAIN_12
+52    0x6598    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0049    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C4    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x013B    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x515F    //RX_FDEQ_GAIN_2
+42    0x5F5F    //RX_FDEQ_GAIN_3
+43    0x5D59    //RX_FDEQ_GAIN_4
+44    0x595F    //RX_FDEQ_GAIN_5
+45    0x656F    //RX_FDEQ_GAIN_6
+46    0x7D87    //RX_FDEQ_GAIN_7
+47    0x8C80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0008    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4E5C    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5A56    //RX_FDEQ_GAIN_4
+44    0x565C    //RX_FDEQ_GAIN_5
+45    0x626C    //RX_FDEQ_GAIN_6
+46    0x7A84    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x665E    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x404C    //RX_FDEQ_GAIN_11
+51    0x5658    //RX_FDEQ_GAIN_12
+52    0x5C98    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x080A    //RX_FDEQ_BIN_7
+71    0x0E0A    //RX_FDEQ_BIN_8
+72    0x0C14    //RX_FDEQ_BIN_9
+73    0x090A    //RX_FDEQ_BIN_10
+74    0x0E06    //RX_FDEQ_BIN_11
+75    0x0A21    //RX_FDEQ_BIN_12
+76    0x1118    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x002C    //TX_NS_LVL_CTRL_2
+284    0x0020    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0190    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5DC0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x5DC0    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x984E    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4C    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4240    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4840    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4E4C    //TX_FDEQ_GAIN_10
+578    0x5A60    //TX_FDEQ_GAIN_11
+579    0x6262    //TX_FDEQ_GAIN_12
+580    0x5A3C    //TX_FDEQ_GAIN_13
+581    0x5656    //TX_FDEQ_GAIN_14
+582    0x585E    //TX_FDEQ_GAIN_15
+583    0x6698    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0201    //TX_FDEQ_BIN_0
+592    0x0105    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0509    //TX_FDEQ_BIN_7
+599    0x0E09    //TX_FDEQ_BIN_8
+600    0x150A    //TX_FDEQ_BIN_9
+601    0x071E    //TX_FDEQ_BIN_10
+602    0x152B    //TX_FDEQ_BIN_11
+603    0x0617    //TX_FDEQ_BIN_12
+604    0x3226    //TX_FDEQ_BIN_13
+605    0x190A    //TX_FDEQ_BIN_14
+606    0x0A0A    //TX_FDEQ_BIN_15
+607    0x0A0A    //TX_FDEQ_BIN_16
+608    0x0A0A    //TX_FDEQ_BIN_17
+609    0x0A0A    //TX_FDEQ_BIN_18
+610    0x0A0A    //TX_FDEQ_BIN_19
+611    0x0A0A    //TX_FDEQ_BIN_20
+612    0x0A0B    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x110C    //TX_PREEQ_BIN_MIC0_6
+648    0x0A04    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0C    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4834    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x5848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1508    //TX_PREEQ_BIN_MIC1_11
+702    0x1D0A    //TX_PREEQ_BIN_MIC1_12
+703    0x040A    //TX_PREEQ_BIN_MIC1_13
+704    0x0A21    //TX_PREEQ_BIN_MIC1_14
+705    0x2890    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05D3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1B00    //RX_TPKA_FP
+127    0x0300    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0017    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0028    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0044    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x006F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B0    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x011C    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484E    //RX_FDEQ_GAIN_1
+41    0x5658    //RX_FDEQ_GAIN_2
+42    0x565A    //RX_FDEQ_GAIN_3
+43    0x5C50    //RX_FDEQ_GAIN_4
+44    0x525E    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4644    //RX_FDEQ_GAIN_17
+57    0x445A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0504    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D9    //RX_TDDRC_DRC_GAIN
+38    0x002A    //RX_FDEQ_SUBNUM
+39    0x9848    //RX_FDEQ_GAIN_0
+40    0x484C    //RX_FDEQ_GAIN_1
+41    0x5458    //RX_FDEQ_GAIN_2
+42    0x5658    //RX_FDEQ_GAIN_3
+43    0x5452    //RX_FDEQ_GAIN_4
+44    0x525A    //RX_FDEQ_GAIN_5
+45    0x6068    //RX_FDEQ_GAIN_6
+46    0x7480    //RX_FDEQ_GAIN_7
+47    0x8A80    //RX_FDEQ_GAIN_8
+48    0x6E62    //RX_FDEQ_GAIN_9
+49    0x6A4A    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x5656    //RX_FDEQ_GAIN_12
+52    0x5866    //RX_FDEQ_GAIN_13
+53    0x7878    //RX_FDEQ_GAIN_14
+54    0x584C    //RX_FDEQ_GAIN_15
+55    0x4C4C    //RX_FDEQ_GAIN_16
+56    0x4A4A    //RX_FDEQ_GAIN_17
+57    0x585A    //RX_FDEQ_GAIN_18
+58    0x5A98    //RX_FDEQ_GAIN_19
+59    0x9898    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0402    //RX_FDEQ_BIN_1
+65    0x0103    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x0806    //RX_FDEQ_BIN_7
+71    0x120A    //RX_FDEQ_BIN_8
+72    0x0C0C    //RX_FDEQ_BIN_9
+73    0x110C    //RX_FDEQ_BIN_10
+74    0x0E14    //RX_FDEQ_BIN_11
+75    0x0E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x1414    //RX_FDEQ_BIN_14
+78    0x1214    //RX_FDEQ_BIN_15
+79    0x1414    //RX_FDEQ_BIN_16
+80    0x141E    //RX_FDEQ_BIN_17
+81    0x0214    //RX_FDEQ_BIN_18
+82    0x1414    //RX_FDEQ_BIN_19
+83    0x1414    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
+#PARAM_TYPE TX+RX
+#TOTAL_CUSTOM_STEP 7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0001    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x1300    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x5A56    //RX_FDEQ_GAIN_2
+42    0x5454    //RX_FDEQ_GAIN_3
+43    0x4E4E    //RX_FDEQ_GAIN_4
+44    0x565E    //RX_FDEQ_GAIN_5
+45    0x6874    //RX_FDEQ_GAIN_6
+46    0x808A    //RX_FDEQ_GAIN_7
+47    0x806A    //RX_FDEQ_GAIN_8
+48    0x5E66    //RX_FDEQ_GAIN_9
+49    0x4E3E    //RX_FDEQ_GAIN_10
+50    0x4852    //RX_FDEQ_GAIN_11
+51    0x5460    //RX_FDEQ_GAIN_12
+52    0x6A5E    //RX_FDEQ_GAIN_13
+53    0x5460    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0103    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0102    //RX_FDEQ_BIN_2
+66    0x0203    //RX_FDEQ_BIN_3
+67    0x0207    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x040C    //RX_FDEQ_BIN_7
+71    0x0708    //RX_FDEQ_BIN_8
+72    0x080B    //RX_FDEQ_BIN_9
+73    0x0909    //RX_FDEQ_BIN_10
+74    0x0D12    //RX_FDEQ_BIN_11
+75    0x0C06    //RX_FDEQ_BIN_12
+76    0x1B0C    //RX_FDEQ_BIN_13
+77    0x491C    //RX_FDEQ_BIN_14
+78    0x06CC    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0040    //TX_MIN_EQ_RE_EST_0
+153    0x0040    //TX_MIN_EQ_RE_EST_1
+154    0x0040    //TX_MIN_EQ_RE_EST_2
+155    0x0040    //TX_MIN_EQ_RE_EST_3
+156    0x0040    //TX_MIN_EQ_RE_EST_4
+157    0x0040    //TX_MIN_EQ_RE_EST_5
+158    0x0040    //TX_MIN_EQ_RE_EST_6
+159    0x0040    //TX_MIN_EQ_RE_EST_7
+160    0x0040    //TX_MIN_EQ_RE_EST_8
+161    0x0040    //TX_MIN_EQ_RE_EST_9
+162    0x0040    //TX_MIN_EQ_RE_EST_10
+163    0x0040    //TX_MIN_EQ_RE_EST_11
+164    0x0040    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7B00    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7B00    //TX_DTD_THR1_2
+200    0x7B00    //TX_DTD_THR1_3
+201    0x7B00    //TX_DTD_THR1_4
+202    0x7B00    //TX_DTD_THR1_5
+203    0x7B00    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x01A0    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x3000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x3000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x001B    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x0017    //TX_NS_LVL_CTRL_3
+285    0x0017    //TX_NS_LVL_CTRL_4
+286    0x0019    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x2000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x5000    //TX_B_POST_FILT_3
+326    0x7FFF    //TX_B_POST_FILT_4
+327    0x7FFF    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7200    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7400    //TX_LAMBDA_PFILT_S_4
+344    0x7200    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2710    //TX_NOISE_TH_3
+373    0x1B58    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0640    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0640    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0080    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4E    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443A    //TX_FDEQ_GAIN_5
+573    0x3E42    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3434    //TX_FDEQ_GAIN_8
+576    0x3040    //TX_FDEQ_GAIN_9
+577    0x4040    //TX_FDEQ_GAIN_10
+578    0x4040    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0302    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F10    //TX_FDEQ_BIN_8
+600    0x100F    //TX_FDEQ_BIN_9
+601    0x0101    //TX_FDEQ_BIN_10
+602    0x0101    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x484A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C50    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D08    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0004    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C48    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0303    //RX_FDEQ_BIN_3
+67    0x0303    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0303    //RX_FDEQ_BIN_6
+70    0x0303    //RX_FDEQ_BIN_7
+71    0x0A0A    //RX_FDEQ_BIN_8
+72    0x0A0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x01A0    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x5000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x001C    //TX_NS_LVL_CTRL_1
+283    0x0019    //TX_NS_LVL_CTRL_2
+284    0x001C    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x001A    //TX_NS_LVL_CTRL_5
+287    0x001E    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0018    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x7000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x2000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x4000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2E90    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x9854    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4E50    //TX_FDEQ_GAIN_3
+571    0x4C48    //TX_FDEQ_GAIN_4
+572    0x4840    //TX_FDEQ_GAIN_5
+573    0x4850    //TX_FDEQ_GAIN_6
+574    0x5050    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4850    //TX_FDEQ_GAIN_10
+578    0x5860    //TX_FDEQ_GAIN_11
+579    0x5C60    //TX_FDEQ_GAIN_12
+580    0x6070    //TX_FDEQ_GAIN_13
+581    0x6A70    //TX_FDEQ_GAIN_14
+582    0x8490    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0506    //TX_FDEQ_BIN_7
+599    0x0F0B    //TX_FDEQ_BIN_8
+600    0x190F    //TX_FDEQ_BIN_9
+601    0x1212    //TX_FDEQ_BIN_10
+602    0x0D2B    //TX_FDEQ_BIN_11
+603    0x0906    //TX_FDEQ_BIN_12
+604    0x0101    //TX_FDEQ_BIN_13
+605    0x0101    //TX_FDEQ_BIN_14
+606    0x0101    //TX_FDEQ_BIN_15
+607    0x0101    //TX_FDEQ_BIN_16
+608    0x0101    //TX_FDEQ_BIN_17
+609    0x0101    //TX_FDEQ_BIN_18
+610    0x0101    //TX_FDEQ_BIN_19
+611    0x0101    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x3448    //TX_PREEQ_GAIN_MIC1_13
+680    0x3848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1908    //TX_PREEQ_BIN_MIC1_11
+702    0x110C    //TX_PREEQ_BIN_MIC1_12
+703    0x0C02    //TX_PREEQ_BIN_MIC1_13
+704    0x0A00    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0004    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05F5    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x014A    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4A4C    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5A5C    //RX_FDEQ_GAIN_7
+47    0x5C5C    //RX_FDEQ_GAIN_8
+48    0x5C5C    //RX_FDEQ_GAIN_9
+49    0x5C5C    //RX_FDEQ_GAIN_10
+50    0x5C5C    //RX_FDEQ_GAIN_11
+51    0x5C5C    //RX_FDEQ_GAIN_12
+52    0x5C5C    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0505    //RX_FDEQ_BIN_4
+68    0x0505    //RX_FDEQ_BIN_5
+69    0x0505    //RX_FDEQ_BIN_6
+70    0x0505    //RX_FDEQ_BIN_7
+71    0x160C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6F7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x002C    //TX_NS_LVL_CTRL_2
+284    0x0020    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0190    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5DC0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x5DC0    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x02F0    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x984E    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4A4C    //TX_FDEQ_GAIN_2
+570    0x4C4C    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4240    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4840    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4E4C    //TX_FDEQ_GAIN_10
+578    0x5A60    //TX_FDEQ_GAIN_11
+579    0x6262    //TX_FDEQ_GAIN_12
+580    0x5A3C    //TX_FDEQ_GAIN_13
+581    0x5656    //TX_FDEQ_GAIN_14
+582    0x585E    //TX_FDEQ_GAIN_15
+583    0x6698    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0201    //TX_FDEQ_BIN_0
+592    0x0105    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0706    //TX_FDEQ_BIN_5
+597    0x0501    //TX_FDEQ_BIN_6
+598    0x0509    //TX_FDEQ_BIN_7
+599    0x0E09    //TX_FDEQ_BIN_8
+600    0x150A    //TX_FDEQ_BIN_9
+601    0x071E    //TX_FDEQ_BIN_10
+602    0x152B    //TX_FDEQ_BIN_11
+603    0x0617    //TX_FDEQ_BIN_12
+604    0x3226    //TX_FDEQ_BIN_13
+605    0x190A    //TX_FDEQ_BIN_14
+606    0x0A0A    //TX_FDEQ_BIN_15
+607    0x0A0A    //TX_FDEQ_BIN_16
+608    0x0A0A    //TX_FDEQ_BIN_17
+609    0x0A0A    //TX_FDEQ_BIN_18
+610    0x0A0A    //TX_FDEQ_BIN_19
+611    0x0A0A    //TX_FDEQ_BIN_20
+612    0x0A0B    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x110C    //TX_PREEQ_BIN_MIC0_6
+648    0x0A04    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0C    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4834    //TX_PREEQ_GAIN_MIC1_11
+678    0x4834    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x5848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1508    //TX_PREEQ_BIN_MIC1_11
+702    0x1D0A    //TX_PREEQ_BIN_MIC1_12
+703    0x040A    //TX_PREEQ_BIN_MIC1_13
+704    0x0A21    //TX_PREEQ_BIN_MIC1_14
+705    0x2890    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0005    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0730    //TX_TDDRC_THRD_2
+857    0x1C00    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05D3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0005    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016B    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0018    //TX_NS_LVL_CTRL_4
+286    0x0016    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0007    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0200    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x9848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4840    //TX_FDEQ_GAIN_2
+570    0x3E4C    //TX_FDEQ_GAIN_3
+571    0x484C    //TX_FDEQ_GAIN_4
+572    0x7058    //TX_FDEQ_GAIN_5
+573    0x6068    //TX_FDEQ_GAIN_6
+574    0x645E    //TX_FDEQ_GAIN_7
+575    0x8054    //TX_FDEQ_GAIN_8
+576    0x5454    //TX_FDEQ_GAIN_9
+577    0x9898    //TX_FDEQ_GAIN_10
+578    0x9898    //TX_FDEQ_GAIN_11
+579    0x9898    //TX_FDEQ_GAIN_12
+580    0x9898    //TX_FDEQ_GAIN_13
+581    0x9898    //TX_FDEQ_GAIN_14
+582    0x9898    //TX_FDEQ_GAIN_15
+583    0x9898    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9898    //TX_FDEQ_GAIN_19
+587    0x9898    //TX_FDEQ_GAIN_20
+588    0x9898    //TX_FDEQ_GAIN_21
+589    0x9898    //TX_FDEQ_GAIN_22
+590    0x9898    //TX_FDEQ_GAIN_23
+591    0x0103    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0605    //TX_FDEQ_BIN_2
+594    0x040A    //TX_FDEQ_BIN_3
+595    0x1417    //TX_FDEQ_BIN_4
+596    0x0C19    //TX_FDEQ_BIN_5
+597    0x1B04    //TX_FDEQ_BIN_6
+598    0x0F25    //TX_FDEQ_BIN_7
+599    0x1610    //TX_FDEQ_BIN_8
+600    0x0605    //TX_FDEQ_BIN_9
+601    0x0505    //TX_FDEQ_BIN_10
+602    0x0D0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A8C    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A14    //TX_FDEQ_BIN_19
+611    0x0301    //TX_FDEQ_BIN_20
+612    0x0101    //TX_FDEQ_BIN_21
+613    0x0101    //TX_FDEQ_BIN_22
+614    0x0101    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x3448    //TX_PREEQ_GAIN_MIC1_10
+677    0x3448    //TX_PREEQ_GAIN_MIC1_11
+678    0x3848    //TX_PREEQ_GAIN_MIC1_12
+679    0x5848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0613    //TX_PREEQ_BIN_MIC1_10
+701    0x0603    //TX_PREEQ_BIN_MIC1_11
+702    0x071D    //TX_PREEQ_BIN_MIC1_12
+703    0x1A6D    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x282C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x6000    //TX_TDDRC_ALPHA_UP_02
+785    0x6000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x6000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0005    //TX_TDDRC_THRD_1
+856    0x0640    //TX_TDDRC_THRD_2
+857    0x1BC0    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0523    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x6000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0730    //RX_TDDRC_THRD_2
+115    0x17C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/felix/tuning/fortemedia/HANDSFREE.dat b/audio/felix/tuning/fortemedia/HANDSFREE.dat
new file mode 100644
index 0000000..da1a6b0
Binary files /dev/null and b/audio/felix/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/felix/tuning/fortemedia/HANDSFREE.mods b/audio/felix/tuning/fortemedia/HANDSFREE.mods
new file mode 100644
index 0000000..ebeb970
--- /dev/null
+++ b/audio/felix/tuning/fortemedia/HANDSFREE.mods
@@ -0,0 +1,12276 @@
+#PLATFORM_NAME  gChip
+#EXPORT_FLAG  HANDSFREE
+#SINGLE_API_VER  1.1.6
+#SAVE_TIME  2021-10-19 18:57:10
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE1-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B50    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0E3A    //TX_PGA_0
+28    0x0E3A    //TX_PGA_1
+29    0x0E3A    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x7FFF    //TX_MIN_EQ_RE_EST_1
+154    0x7FFF    //TX_MIN_EQ_RE_EST_2
+155    0x7FFF    //TX_MIN_EQ_RE_EST_3
+156    0x7FFF    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0080    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x04B0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x0960    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0048    //TX_EPD_OFFSET_00
+233    0x0048    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7F80    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0100    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x4000    //TX_DT_BINVAD_TH_3
+357    0x0BB8    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01FF    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x484D    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4854    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x4A50    //TX_FDEQ_GAIN_6
+574    0x484C    //TX_FDEQ_GAIN_7
+575    0x5256    //TX_FDEQ_GAIN_8
+576    0x5A5A    //TX_FDEQ_GAIN_9
+577    0x6468    //TX_FDEQ_GAIN_10
+578    0x807C    //TX_FDEQ_GAIN_11
+579    0x84AC    //TX_FDEQ_GAIN_12
+580    0xCACA    //TX_FDEQ_GAIN_13
+581    0xCACA    //TX_FDEQ_GAIN_14
+582    0xCACA    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0302    //TX_FDEQ_BIN_2
+594    0x0204    //TX_FDEQ_BIN_3
+595    0x0509    //TX_FDEQ_BIN_4
+596    0x030A    //TX_FDEQ_BIN_5
+597    0x0709    //TX_FDEQ_BIN_6
+598    0x0809    //TX_FDEQ_BIN_7
+599    0x1D0B    //TX_FDEQ_BIN_8
+600    0x0B0B    //TX_FDEQ_BIN_9
+601    0x0B1B    //TX_FDEQ_BIN_10
+602    0x351B    //TX_FDEQ_BIN_11
+603    0x1A0D    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x202F    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484C    //TX_PREEQ_GAIN_MIC0_7
+625    0x5050    //TX_PREEQ_GAIN_MIC0_8
+626    0x5050    //TX_PREEQ_GAIN_MIC0_9
+627    0x545C    //TX_PREEQ_GAIN_MIC0_10
+628    0x6A7A    //TX_PREEQ_GAIN_MIC0_11
+629    0x625C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x3A1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x0140    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x6C40    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0D56    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0051    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0081    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00CC    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0143    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0217    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM2-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B58    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0E3A    //TX_PGA_0
+28    0x0E3A    //TX_PGA_1
+29    0x0E3A    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x7FFF    //TX_MIN_EQ_RE_EST_1
+154    0x7FFF    //TX_MIN_EQ_RE_EST_2
+155    0x7FFF    //TX_MIN_EQ_RE_EST_3
+156    0x7FFF    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0080    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x04B0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x0960    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0048    //TX_EPD_OFFSET_00
+233    0x0048    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7F80    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0100    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x4000    //TX_DT_BINVAD_TH_3
+357    0x0BB8    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01FF    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x484D    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4854    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x4A50    //TX_FDEQ_GAIN_6
+574    0x484C    //TX_FDEQ_GAIN_7
+575    0x5256    //TX_FDEQ_GAIN_8
+576    0x5A5A    //TX_FDEQ_GAIN_9
+577    0x6468    //TX_FDEQ_GAIN_10
+578    0x807C    //TX_FDEQ_GAIN_11
+579    0x84AC    //TX_FDEQ_GAIN_12
+580    0xCACA    //TX_FDEQ_GAIN_13
+581    0xCACA    //TX_FDEQ_GAIN_14
+582    0xCACA    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0302    //TX_FDEQ_BIN_2
+594    0x0204    //TX_FDEQ_BIN_3
+595    0x0509    //TX_FDEQ_BIN_4
+596    0x030A    //TX_FDEQ_BIN_5
+597    0x0709    //TX_FDEQ_BIN_6
+598    0x0809    //TX_FDEQ_BIN_7
+599    0x1D0B    //TX_FDEQ_BIN_8
+600    0x0B0B    //TX_FDEQ_BIN_9
+601    0x0B1B    //TX_FDEQ_BIN_10
+602    0x351B    //TX_FDEQ_BIN_11
+603    0x1A0D    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x202F    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484C    //TX_PREEQ_GAIN_MIC0_7
+625    0x5050    //TX_PREEQ_GAIN_MIC0_8
+626    0x5050    //TX_PREEQ_GAIN_MIC0_9
+627    0x545C    //TX_PREEQ_GAIN_MIC0_10
+628    0x6A7A    //TX_PREEQ_GAIN_MIC0_11
+629    0x625C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x3A1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x0140    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x6C40    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0D56    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5C58    //RX_FDEQ_GAIN_2
+42    0x5050    //RX_FDEQ_GAIN_3
+43    0x4852    //RX_FDEQ_GAIN_4
+44    0x4E48    //RX_FDEQ_GAIN_5
+45    0x4E72    //RX_FDEQ_GAIN_6
+46    0x868E    //RX_FDEQ_GAIN_7
+47    0x8E72    //RX_FDEQ_GAIN_8
+48    0x7078    //RX_FDEQ_GAIN_9
+49    0x787A    //RX_FDEQ_GAIN_10
+50    0x9478    //RX_FDEQ_GAIN_11
+51    0x5C6C    //RX_FDEQ_GAIN_12
+52    0x7A78    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0051    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0081    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00CC    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0143    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0217    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B70    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0E3A    //TX_PGA_0
+28    0x0E3A    //TX_PGA_1
+29    0x0E3A    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x7FFF    //TX_MIN_EQ_RE_EST_1
+154    0x7FFF    //TX_MIN_EQ_RE_EST_2
+155    0x7FFF    //TX_MIN_EQ_RE_EST_3
+156    0x7FFF    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0080    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x04B0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x0960    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0048    //TX_EPD_OFFSET_00
+233    0x0048    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7F80    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0100    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x4000    //TX_DT_BINVAD_TH_3
+357    0x0BB8    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01FF    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x484D    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4854    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x4A50    //TX_FDEQ_GAIN_6
+574    0x484C    //TX_FDEQ_GAIN_7
+575    0x5256    //TX_FDEQ_GAIN_8
+576    0x5A5A    //TX_FDEQ_GAIN_9
+577    0x6468    //TX_FDEQ_GAIN_10
+578    0x807C    //TX_FDEQ_GAIN_11
+579    0x84AC    //TX_FDEQ_GAIN_12
+580    0xCACA    //TX_FDEQ_GAIN_13
+581    0xCACA    //TX_FDEQ_GAIN_14
+582    0xCACA    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0302    //TX_FDEQ_BIN_2
+594    0x0204    //TX_FDEQ_BIN_3
+595    0x0509    //TX_FDEQ_BIN_4
+596    0x030A    //TX_FDEQ_BIN_5
+597    0x0709    //TX_FDEQ_BIN_6
+598    0x0809    //TX_FDEQ_BIN_7
+599    0x1D0B    //TX_FDEQ_BIN_8
+600    0x0B0B    //TX_FDEQ_BIN_9
+601    0x0B1B    //TX_FDEQ_BIN_10
+602    0x351B    //TX_FDEQ_BIN_11
+603    0x1A0D    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x202F    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484C    //TX_PREEQ_GAIN_MIC0_7
+625    0x5050    //TX_PREEQ_GAIN_MIC0_8
+626    0x5050    //TX_PREEQ_GAIN_MIC0_9
+627    0x545C    //TX_PREEQ_GAIN_MIC0_10
+628    0x6A7A    //TX_PREEQ_GAIN_MIC0_11
+629    0x625C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x3A1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x0140    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x6C40    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0D56    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x4854    //RX_FDEQ_GAIN_1
+41    0x5C58    //RX_FDEQ_GAIN_2
+42    0x5050    //RX_FDEQ_GAIN_3
+43    0x4852    //RX_FDEQ_GAIN_4
+44    0x4E48    //RX_FDEQ_GAIN_5
+45    0x4E72    //RX_FDEQ_GAIN_6
+46    0x868E    //RX_FDEQ_GAIN_7
+47    0x8E72    //RX_FDEQ_GAIN_8
+48    0x7078    //RX_FDEQ_GAIN_9
+49    0x787A    //RX_FDEQ_GAIN_10
+50    0x9478    //RX_FDEQ_GAIN_11
+51    0x5C6C    //RX_FDEQ_GAIN_12
+52    0x7A78    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0051    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0081    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00CC    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0143    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0217    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6F78    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7800    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x1000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x1000    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x2000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0000    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0FA0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x07D0    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0008    //TX_EPD_OFFSET_00
+233    0x0008    //TX_EPD_OFFST_01
+234    0x0FA0    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0012    //TX_NS_LVL_CTRL_1
+283    0x0017    //TX_NS_LVL_CTRL_2
+284    0x0015    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000F    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x2000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x3000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x3000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7F00    //TX_LAMBDA_PFILT_S_0
+340    0x7900    //TX_LAMBDA_PFILT_S_1
+341    0x7400    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0100    //TX_DT_BINVAD_TH_1
+355    0x0400    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0080    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01B0    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x55F0    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0003    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x4E4E    //TX_FDEQ_GAIN_0
+568    0x4E4D    //TX_FDEQ_GAIN_1
+569    0x4D4D    //TX_FDEQ_GAIN_2
+570    0x4D48    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x5248    //TX_FDEQ_GAIN_6
+574    0x403E    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0403    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0805    //TX_FDEQ_BIN_6
+598    0x070E    //TX_FDEQ_BIN_7
+599    0x0B0E    //TX_FDEQ_BIN_8
+600    0x0B0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x484A    //TX_PREEQ_GAIN_MIC0_8
+626    0x4C50    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D08    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C08    //TX_PREEQ_BIN_MIC1_2
+693    0x0700    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x7800    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0003    //TX_GAIN_LIMIT_1
+775    0x0006    //TX_GAIN_LIMIT_2
+776    0x0006    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0006    //TX_TDDRC_THRD_0
+855    0x0012    //TX_TDDRC_THRD_1
+856    0x1200    //TX_TDDRC_THRD_2
+857    0x1C60    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0A10    //RX_MAX_G_FP
+129    0x004E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00BD    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1B60    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0127    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1B60    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01CE    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x6058    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5E58    //RX_FDEQ_GAIN_4
+44    0x584E    //RX_FDEQ_GAIN_5
+45    0x5450    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1B60    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02E3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x605A    //RX_FDEQ_GAIN_2
+42    0x6666    //RX_FDEQ_GAIN_3
+43    0x6460    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0007    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1B60    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0xA8A8    //RX_FDEQ_GAIN_0
+40    0x7658    //RX_FDEQ_GAIN_1
+41    0x605A    //RX_FDEQ_GAIN_2
+42    0x6666    //RX_FDEQ_GAIN_3
+43    0x6460    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4854    //RX_FDEQ_GAIN_8
+48    0x5454    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0303    //RX_FDEQ_BIN_1
+65    0x0202    //RX_FDEQ_BIN_2
+66    0x0705    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B14    //RX_FDEQ_BIN_8
+72    0x0B08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6F78    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6800    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x6000    //TX_MIN_EQ_RE_EST_3
+156    0x6000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0800    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x76D0    //TX_DTD_THR1_0
+198    0x76D0    //TX_DTD_THR1_1
+199    0x76D0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0001    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x03E8    //TX_RATIO_DT_L_TH_LOW
+224    0x251C    //TX_RATIO_DT_H_TH_LOW
+225    0x07D0    //TX_RATIO_DT_L_TH_HIGH
+226    0x31CE    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x5000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0016    //TX_EPD_OFFSET_00
+233    0x0016    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x2000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x1800    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x1C00    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0100    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0400    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x0DAC    //TX_DT_BINVAD_ENDF
+358    0x0400    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01B0    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0032    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0578    //TX_NOISE_TH_1
+371    0x0230    //TX_NOISE_TH_2
+372    0x4A38    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x55B8    //TX_NOISE_TH_5
+375    0x7148    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0008    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4E4E    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4D4D    //TX_FDEQ_GAIN_2
+570    0x4D48    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4A48    //TX_FDEQ_GAIN_5
+573    0x5248    //TX_FDEQ_GAIN_6
+574    0x4844    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x4048    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x5050    //TX_FDEQ_GAIN_11
+579    0x5454    //TX_FDEQ_GAIN_12
+580    0x5858    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0403    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0509    //TX_FDEQ_BIN_5
+597    0x0901    //TX_FDEQ_BIN_6
+598    0x070E    //TX_FDEQ_BIN_7
+599    0x0B0E    //TX_FDEQ_BIN_8
+600    0x0B0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x484A    //TX_PREEQ_GAIN_MIC0_8
+626    0x4C50    //TX_PREEQ_GAIN_MIC0_9
+627    0x5050    //TX_PREEQ_GAIN_MIC0_10
+628    0x5054    //TX_PREEQ_GAIN_MIC0_11
+629    0x585C    //TX_PREEQ_GAIN_MIC0_12
+630    0x5C64    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1104    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x0700    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0003    //TX_GAIN_LIMIT_1
+775    0x0006    //TX_GAIN_LIMIT_2
+776    0x0006    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1200    //TX_TDDRC_THRD_2
+857    0x1C60    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E75    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0800    //RX_MAX_G_FP
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0066    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A1    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0003    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0293    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x7488    //RX_FDEQ_GAIN_8
+48    0x7E80    //RX_FDEQ_GAIN_9
+49    0x646E    //RX_FDEQ_GAIN_10
+50    0x6A72    //RX_FDEQ_GAIN_11
+51    0x727A    //RX_FDEQ_GAIN_12
+52    0x6060    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0715    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4856    //RX_FDEQ_GAIN_2
+42    0x605C    //RX_FDEQ_GAIN_3
+43    0x5E56    //RX_FDEQ_GAIN_4
+44    0x544E    //RX_FDEQ_GAIN_5
+45    0x4E58    //RX_FDEQ_GAIN_6
+46    0x4E4E    //RX_FDEQ_GAIN_7
+47    0x748A    //RX_FDEQ_GAIN_8
+48    0x8C8C    //RX_FDEQ_GAIN_9
+49    0x7480    //RX_FDEQ_GAIN_10
+50    0x7C84    //RX_FDEQ_GAIN_11
+51    0x848C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x7080    //RX_FDEQ_GAIN_14
+54    0x7C98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0201    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0505    //RX_FDEQ_BIN_3
+67    0x0205    //RX_FDEQ_BIN_4
+68    0x0303    //RX_FDEQ_BIN_5
+69    0x0A08    //RX_FDEQ_BIN_6
+70    0x1910    //RX_FDEQ_BIN_7
+71    0x110A    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1E13    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6F78    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x6000    //TX_MIN_EQ_RE_EST_2
+155    0x7FFF    //TX_MIN_EQ_RE_EST_3
+156    0x7FFF    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0080    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB0    //TX_DT_CUT_K
+214    0x0001    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x04B0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x0960    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x4000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0032    //TX_EPD_OFFSET_00
+233    0x0032    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0020    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0028    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0011    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x1000    //TX_SNRI_SUP_1
+302    0x1400    //TX_SNRI_SUP_2
+303    0x1400    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x7C00    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7F20    //TX_LAMBDA_PFILT_S_0
+340    0x7D00    //TX_LAMBDA_PFILT_S_1
+341    0x7D00    //TX_LAMBDA_PFILT_S_2
+342    0x7D00    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x07D0    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x0BB8    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01B0    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2710    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x7848    //TX_FDEQ_GAIN_0
+568    0x484C    //TX_FDEQ_GAIN_1
+569    0x4E4C    //TX_FDEQ_GAIN_2
+570    0x504C    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x584C    //TX_FDEQ_GAIN_6
+574    0x4C54    //TX_FDEQ_GAIN_7
+575    0x4E54    //TX_FDEQ_GAIN_8
+576    0x4C50    //TX_FDEQ_GAIN_9
+577    0x545A    //TX_FDEQ_GAIN_10
+578    0x5C68    //TX_FDEQ_GAIN_11
+579    0x6168    //TX_FDEQ_GAIN_12
+580    0x7270    //TX_FDEQ_GAIN_13
+581    0x786C    //TX_FDEQ_GAIN_14
+582    0x84CA    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0403    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0B02    //TX_FDEQ_BIN_6
+598    0x070E    //TX_FDEQ_BIN_7
+599    0x0B0E    //TX_FDEQ_BIN_8
+600    0x0B0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x0C15    //TX_FDEQ_BIN_12
+604    0x1128    //TX_FDEQ_BIN_13
+605    0x5028    //TX_FDEQ_BIN_14
+606    0x284A    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x484A    //TX_PREEQ_GAIN_MIC0_8
+626    0x4C50    //TX_PREEQ_GAIN_MIC0_9
+627    0x5050    //TX_PREEQ_GAIN_MIC0_10
+628    0x5054    //TX_PREEQ_GAIN_MIC0_11
+629    0x5C6A    //TX_PREEQ_GAIN_MIC0_12
+630    0x7A60    //TX_PREEQ_GAIN_MIC0_13
+631    0x5C48    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1719    //TX_PREEQ_BIN_MIC0_11
+653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x070F    //TX_PREEQ_BIN_MIC1_8
+699    0x1F08    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0920    //TX_PREEQ_BIN_MIC1_11
+702    0x2020    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0xF200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0060    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0042    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0003    //TX_GAIN_LIMIT_0
+774    0x0006    //TX_GAIN_LIMIT_1
+775    0x0006    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0009    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1200    //TX_TDDRC_THRD_2
+857    0x1C60    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0DA6    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x0800    //RX_MAX_G_FP
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0042    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0068    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00F8    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0188    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x028F    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x707E    //RX_FDEQ_GAIN_8
+48    0x807A    //RX_FDEQ_GAIN_9
+49    0x6A60    //RX_FDEQ_GAIN_10
+50    0x6868    //RX_FDEQ_GAIN_11
+51    0x6C84    //RX_FDEQ_GAIN_12
+52    0x624C    //RX_FDEQ_GAIN_13
+53    0x5862    //RX_FDEQ_GAIN_14
+54    0x6E98    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0715    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0xA4A4    //RX_FDEQ_GAIN_0
+40    0x604C    //RX_FDEQ_GAIN_1
+41    0x4854    //RX_FDEQ_GAIN_2
+42    0x5C5C    //RX_FDEQ_GAIN_3
+43    0x5850    //RX_FDEQ_GAIN_4
+44    0x5048    //RX_FDEQ_GAIN_5
+45    0x524E    //RX_FDEQ_GAIN_6
+46    0x484E    //RX_FDEQ_GAIN_7
+47    0x7284    //RX_FDEQ_GAIN_8
+48    0x8C8C    //RX_FDEQ_GAIN_9
+49    0x7E74    //RX_FDEQ_GAIN_10
+50    0x7C7C    //RX_FDEQ_GAIN_11
+51    0x7E96    //RX_FDEQ_GAIN_12
+52    0x7A60    //RX_FDEQ_GAIN_13
+53    0x6A76    //RX_FDEQ_GAIN_14
+54    0x7898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0102    //RX_FDEQ_BIN_1
+65    0x0504    //RX_FDEQ_BIN_2
+66    0x0006    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0309    //RX_FDEQ_BIN_5
+69    0x0806    //RX_FDEQ_BIN_6
+70    0x071E    //RX_FDEQ_BIN_7
+71    0x0D10    //RX_FDEQ_BIN_8
+72    0x0A0A    //RX_FDEQ_BIN_9
+73    0x0A0A    //RX_FDEQ_BIN_10
+74    0x0A0A    //RX_FDEQ_BIN_11
+75    0x0A0A    //RX_FDEQ_BIN_12
+76    0x1424    //RX_FDEQ_BIN_13
+77    0x2150    //RX_FDEQ_BIN_14
+78    0x2860    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B78    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x008A    //TX_DIST2REF1
+22    0x0018    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0E3A    //TX_PGA_0
+28    0x0E3A    //TX_PGA_1
+29    0x0E3A    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x7FFF    //TX_MIN_EQ_RE_EST_1
+154    0x7FFF    //TX_MIN_EQ_RE_EST_2
+155    0x7FFF    //TX_MIN_EQ_RE_EST_3
+156    0x7FFF    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0080    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x04B0    //TX_RATIO_DT_L_TH_LOW
+224    0x2616    //TX_RATIO_DT_H_TH_LOW
+225    0x0960    //TX_RATIO_DT_L_TH_HIGH
+226    0x32C8    //TX_RATIO_DT_H_TH_HIGH
+227    0x0640    //TX_RATIO_DT_L0_TH
+228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0048    //TX_EPD_OFFSET_00
+233    0x0048    //TX_EPD_OFFST_01
+234    0x0C80    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7F80    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0100    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x4000    //TX_DT_BINVAD_TH_3
+357    0x0BB8    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x01FF    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0005    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x484D    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4854    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x4A50    //TX_FDEQ_GAIN_6
+574    0x484C    //TX_FDEQ_GAIN_7
+575    0x5256    //TX_FDEQ_GAIN_8
+576    0x5A5A    //TX_FDEQ_GAIN_9
+577    0x6468    //TX_FDEQ_GAIN_10
+578    0x807C    //TX_FDEQ_GAIN_11
+579    0x84AC    //TX_FDEQ_GAIN_12
+580    0xCACA    //TX_FDEQ_GAIN_13
+581    0xCACA    //TX_FDEQ_GAIN_14
+582    0xCACA    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0207    //TX_FDEQ_BIN_1
+593    0x0302    //TX_FDEQ_BIN_2
+594    0x0204    //TX_FDEQ_BIN_3
+595    0x0509    //TX_FDEQ_BIN_4
+596    0x030A    //TX_FDEQ_BIN_5
+597    0x0709    //TX_FDEQ_BIN_6
+598    0x0809    //TX_FDEQ_BIN_7
+599    0x1D0B    //TX_FDEQ_BIN_8
+600    0x0B0B    //TX_FDEQ_BIN_9
+601    0x0B1B    //TX_FDEQ_BIN_10
+602    0x351B    //TX_FDEQ_BIN_11
+603    0x1A0D    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x202F    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484C    //TX_PREEQ_GAIN_MIC0_7
+625    0x5050    //TX_PREEQ_GAIN_MIC0_8
+626    0x5050    //TX_PREEQ_GAIN_MIC0_9
+627    0x545C    //TX_PREEQ_GAIN_MIC0_10
+628    0x6A7A    //TX_PREEQ_GAIN_MIC0_11
+629    0x625C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x3A1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x6000    //TX_TDDRC_ALPHA_UP_01
+784    0x7EB8    //TX_TDDRC_ALPHA_UP_02
+785    0x7EB8    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x6000    //TX_TDDRC_ALPHA_DWN_02
+789    0x6000    //TX_TDDRC_ALPHA_DWN_03
+790    0x4000    //TX_TDDRC_ALPHA_DWN_04
+791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1200    //TX_TDDRC_THRD_2
+857    0x1C60    //TX_TDDRC_THRD_3
+858    0x0000    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0D56    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0051    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0081    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00CC    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0143    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0217    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x6000    //RX_TDDRC_ALPHA_DWN_1
+28    0x6000    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C20    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0504    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x9858    //RX_FDEQ_GAIN_0
+40    0x505C    //RX_FDEQ_GAIN_1
+41    0x6460    //RX_FDEQ_GAIN_2
+42    0x5656    //RX_FDEQ_GAIN_3
+43    0x5460    //RX_FDEQ_GAIN_4
+44    0x6454    //RX_FDEQ_GAIN_5
+45    0x5678    //RX_FDEQ_GAIN_6
+46    0x8A84    //RX_FDEQ_GAIN_7
+47    0x8474    //RX_FDEQ_GAIN_8
+48    0x6876    //RX_FDEQ_GAIN_9
+49    0x7676    //RX_FDEQ_GAIN_10
+50    0x826C    //RX_FDEQ_GAIN_11
+51    0x505A    //RX_FDEQ_GAIN_12
+52    0x8870    //RX_FDEQ_GAIN_13
+53    0x9898    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0403    //RX_FDEQ_BIN_1
+65    0x0602    //RX_FDEQ_BIN_2
+66    0x0302    //RX_FDEQ_BIN_3
+67    0x0605    //RX_FDEQ_BIN_4
+68    0x0405    //RX_FDEQ_BIN_5
+69    0x1409    //RX_FDEQ_BIN_6
+70    0x0A07    //RX_FDEQ_BIN_7
+71    0x0707    //RX_FDEQ_BIN_8
+72    0x0607    //RX_FDEQ_BIN_9
+73    0x0607    //RX_FDEQ_BIN_10
+74    0x070D    //RX_FDEQ_BIN_11
+75    0x1816    //RX_FDEQ_BIN_12
+76    0x361A    //RX_FDEQ_BIN_13
+77    0x5028    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/felix/tuning/fortemedia/HEADSET.dat b/audio/felix/tuning/fortemedia/HEADSET.dat
new file mode 100644
index 0000000..9fd56dd
Binary files /dev/null and b/audio/felix/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/felix/tuning/fortemedia/HEADSET.mods b/audio/felix/tuning/fortemedia/HEADSET.mods
new file mode 100644
index 0000000..9f29f96
--- /dev/null
+++ b/audio/felix/tuning/fortemedia/HEADSET.mods
@@ -0,0 +1,56101 @@
+#PLATFORM_NAME  gChip
+#EXPORT_FLAG  HEADSET
+#SINGLE_API_VER  1.1.6
+#SAVE_TIME  2021-08-20 16:33:31
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2900    //TX_MIN_EQ_RE_EST_0
+153    0x1000    //TX_MIN_EQ_RE_EST_1
+154    0x1000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0064    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x2000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFD00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0400    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x5000    //TX_SNRI_SUP_2
+303    0x5000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x7FFF    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x7000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x0400    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x6000    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0029    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0900    //TX_NOISE_TH_1
+371    0x0033    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x0231    //TX_NOISE_TH_4
+374    0x68DE    //TX_NOISE_TH_5
+375    0x5784    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x443C    //TX_FDEQ_GAIN_5
+573    0x2A30    //TX_FDEQ_GAIN_6
+574    0x2C2C    //TX_FDEQ_GAIN_7
+575    0x2820    //TX_FDEQ_GAIN_8
+576    0x2024    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0008    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0700    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x2000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F4    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F4    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0211    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0211    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0211    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0087    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x5FFC    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0211    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x4500    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x0064    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7D00    //TX_DTD_THR1_2
+200    0x7D00    //TX_DTD_THR1_3
+201    0x7D00    //TX_DTD_THR1_4
+202    0x7D00    //TX_DTD_THR1_5
+203    0x7D00    //TX_DTD_THR1_6
+204    0x4000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF700    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0018    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x001C    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x0009    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x3000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0065    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0900    //TX_NOISE_TH_1
+371    0x009B    //TX_NOISE_TH_2
+372    0x4149    //TX_NOISE_TH_3
+373    0x0331    //TX_NOISE_TH_4
+374    0x542C    //TX_NOISE_TH_5
+375    0x55E5    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00FB    //TX_NOISE_TH_6
+379    0x0029    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0029    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4849    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4140    //TX_FDEQ_GAIN_5
+573    0x3838    //TX_FDEQ_GAIN_6
+574    0x3839    //TX_FDEQ_GAIN_7
+575    0x3830    //TX_FDEQ_GAIN_8
+576    0x3033    //TX_FDEQ_GAIN_9
+577    0x2E2E    //TX_FDEQ_GAIN_10
+578    0x2A2A    //TX_FDEQ_GAIN_11
+579    0x2A32    //TX_FDEQ_GAIN_12
+580    0x3838    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0700    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xCCCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01AE    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01AE    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01B6    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0051    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C9    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0095    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1D00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01A0    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x484B    //RX_FDEQ_GAIN_6
+46    0x4B48    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4846    //RX_FDEQ_GAIN_10
+50    0x403F    //RX_FDEQ_GAIN_11
+51    0x3F40    //RX_FDEQ_GAIN_12
+52    0x4248    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6D60    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF700    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0018    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x0009    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x5000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x3000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4040    //TX_FDEQ_GAIN_6
+574    0x4040    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3838    //TX_FDEQ_GAIN_10
+578    0x3828    //TX_FDEQ_GAIN_11
+579    0x2828    //TX_FDEQ_GAIN_12
+580    0x2828    //TX_FDEQ_GAIN_13
+581    0x1C1C    //TX_FDEQ_GAIN_14
+582    0x1C1C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x284A    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0020    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0236    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0033    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0055    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0020    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x0800    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x1000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x07DA    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x484C    //TX_FDEQ_GAIN_10
+578    0x5054    //TX_FDEQ_GAIN_11
+579    0x606C    //TX_FDEQ_GAIN_12
+580    0x7890    //TX_FDEQ_GAIN_13
+581    0x9C9C    //TX_FDEQ_GAIN_14
+582    0x9C9C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2020    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0010    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0081    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4852    //RX_FDEQ_GAIN_0
+40    0x5858    //RX_FDEQ_GAIN_1
+41    0x5C5A    //RX_FDEQ_GAIN_2
+42    0x4F50    //RX_FDEQ_GAIN_3
+43    0x5A61    //RX_FDEQ_GAIN_4
+44    0x605B    //RX_FDEQ_GAIN_5
+45    0x5050    //RX_FDEQ_GAIN_6
+46    0x5050    //RX_FDEQ_GAIN_7
+47    0x5044    //RX_FDEQ_GAIN_8
+48    0x3633    //RX_FDEQ_GAIN_9
+49    0x3424    //RX_FDEQ_GAIN_10
+50    0x1A24    //RX_FDEQ_GAIN_11
+51    0x2B37    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x0400    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x6048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5850    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0302    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D07    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1119    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x0400    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x6048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5850    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0302    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D07    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1119    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1800    //TX_MIN_EQ_RE_EST_7
+160    0x1800    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x2000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x157C    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0012    //TX_NS_LVL_CTRL_1
+283    0x0017    //TX_NS_LVL_CTRL_2
+284    0x0015    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000F    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x1000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x2400    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x1000    //TX_A_POST_FILT_S_4
+319    0x3000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x3000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7900    //TX_LAMBDA_PFILT_S_1
+341    0x7400    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7000    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0400    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5528    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5858    //TX_FDEQ_GAIN_0
+568    0x5850    //TX_FDEQ_GAIN_1
+569    0x5050    //TX_FDEQ_GAIN_2
+570    0x5048    //TX_FDEQ_GAIN_3
+571    0x3C48    //TX_FDEQ_GAIN_4
+572    0x3C48    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4842    //TX_FDEQ_GAIN_7
+575    0x3030    //TX_FDEQ_GAIN_8
+576    0x3030    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D08    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4B4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D08    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C08    //TX_PREEQ_BIN_MIC1_2
+693    0x0700    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x7800    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6800    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x07D0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0800    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0032    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x017E    //TX_NOISE_TH_1
+371    0x0230    //TX_NOISE_TH_2
+372    0x3492    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x55B8    //TX_NOISE_TH_5
+375    0x49E6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5050    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x5050    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x3C36    //TX_FDEQ_GAIN_10
+578    0x3A3A    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x5E64    //TX_PREEQ_GAIN_MIC0_12
+630    0x6464    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1104    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x0700    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x6590    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x003C    //TX_NS_LVL_CTRL_2
+284    0x0024    //TX_NS_LVL_CTRL_3
+285    0x003C    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x1400    //TX_SNRI_SUP_1
+302    0x1400    //TX_SNRI_SUP_2
+303    0x1400    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x7C00    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x6000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7D00    //TX_LAMBDA_PFILT_S_1
+341    0x7D00    //TX_LAMBDA_PFILT_S_2
+342    0x7D00    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x484A    //TX_FDEQ_GAIN_5
+573    0x4E5E    //TX_FDEQ_GAIN_6
+574    0x5C4C    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x4448    //TX_FDEQ_GAIN_10
+578    0x4850    //TX_FDEQ_GAIN_11
+579    0x5C6A    //TX_FDEQ_GAIN_12
+580    0x5A84    //TX_FDEQ_GAIN_13
+581    0x7880    //TX_FDEQ_GAIN_14
+582    0x7F7F    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x6474    //TX_PREEQ_GAIN_MIC0_12
+630    0x7870    //TX_PREEQ_GAIN_MIC0_13
+631    0x5C48    //TX_PREEQ_GAIN_MIC0_14
+632    0x383C    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1719    //TX_PREEQ_BIN_MIC0_11
+653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x070F    //TX_PREEQ_BIN_MIC1_8
+699    0x1F08    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0920    //TX_PREEQ_BIN_MIC1_11
+702    0x2020    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0xF200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x4B7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0A98    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x0400    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D08    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2030    //RX_TDDRC_THRD_2
+115    0x2030    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0478    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x6000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x000F    //TX_NS_LVL_CTRL_1
+283    0x0011    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0021    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0037    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B6A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0400    //TX_DELTA_THR_SN_EST_2
+253    0x0300    //TX_DELTA_THR_SN_EST_3
+254    0x0600    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x0011    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x7000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x002C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x027C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0005    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0041    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x008A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0700    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8080    //RX_FDEQ_GAIN_0
+40    0x8058    //RX_FDEQ_GAIN_1
+41    0x5454    //RX_FDEQ_GAIN_2
+42    0x545C    //RX_FDEQ_GAIN_3
+43    0x6448    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x5848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x485A    //RX_FDEQ_GAIN_8
+48    0x5A58    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x027C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x6868    //RX_FDEQ_GAIN_0
+40    0x6858    //RX_FDEQ_GAIN_1
+41    0x5858    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5C5C    //RX_FDEQ_GAIN_4
+44    0x5854    //RX_FDEQ_GAIN_5
+45    0x544C    //RX_FDEQ_GAIN_6
+46    0x4C4C    //RX_FDEQ_GAIN_7
+47    0x4C60    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x6868    //RX_FDEQ_GAIN_0
+40    0x6858    //RX_FDEQ_GAIN_1
+41    0x5858    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5C5C    //RX_FDEQ_GAIN_4
+44    0x5854    //RX_FDEQ_GAIN_5
+45    0x544C    //RX_FDEQ_GAIN_6
+46    0x4C4C    //RX_FDEQ_GAIN_7
+47    0x4C60    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0014    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x6868    //RX_FDEQ_GAIN_0
+40    0x6858    //RX_FDEQ_GAIN_1
+41    0x5858    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5C5C    //RX_FDEQ_GAIN_4
+44    0x5854    //RX_FDEQ_GAIN_5
+45    0x544C    //RX_FDEQ_GAIN_6
+46    0x4C4C    //RX_FDEQ_GAIN_7
+47    0x4C60    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x6868    //RX_FDEQ_GAIN_0
+40    0x6858    //RX_FDEQ_GAIN_1
+41    0x5858    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5C5C    //RX_FDEQ_GAIN_4
+44    0x5854    //RX_FDEQ_GAIN_5
+45    0x544C    //RX_FDEQ_GAIN_6
+46    0x4C4C    //RX_FDEQ_GAIN_7
+47    0x4C60    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0026    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x6868    //RX_FDEQ_GAIN_0
+40    0x6858    //RX_FDEQ_GAIN_1
+41    0x5858    //RX_FDEQ_GAIN_2
+42    0x5858    //RX_FDEQ_GAIN_3
+43    0x5C5C    //RX_FDEQ_GAIN_4
+44    0x5854    //RX_FDEQ_GAIN_5
+45    0x544C    //RX_FDEQ_GAIN_6
+46    0x4C4C    //RX_FDEQ_GAIN_7
+47    0x4C60    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x7878    //RX_FDEQ_GAIN_0
+40    0x786C    //RX_FDEQ_GAIN_1
+41    0x6C6C    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5A60    //RX_FDEQ_GAIN_4
+44    0x7A54    //RX_FDEQ_GAIN_5
+45    0x5448    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x7878    //RX_FDEQ_GAIN_0
+40    0x786C    //RX_FDEQ_GAIN_1
+41    0x6C6C    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5A60    //RX_FDEQ_GAIN_4
+44    0x7A54    //RX_FDEQ_GAIN_5
+45    0x5448    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0085    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1C00    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x06AF    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x7878    //RX_FDEQ_GAIN_0
+40    0x786C    //RX_FDEQ_GAIN_1
+41    0x6C6C    //RX_FDEQ_GAIN_2
+42    0x6262    //RX_FDEQ_GAIN_3
+43    0x5A60    //RX_FDEQ_GAIN_4
+44    0x7A54    //RX_FDEQ_GAIN_5
+45    0x5448    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x6068    //RX_FDEQ_GAIN_9
+49    0x7070    //RX_FDEQ_GAIN_10
+50    0x8070    //RX_FDEQ_GAIN_11
+51    0x6060    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0204    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x0A0A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x027C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0019    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0019    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0023    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0032    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0048    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0068    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0097    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x6000    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7EB8    //RX_TDDRC_SLANT_0
+117    0x2500    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BC    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x484E    //RX_FDEQ_GAIN_0
+40    0x4E4E    //RX_FDEQ_GAIN_1
+41    0x4E4E    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x484E    //RX_FDEQ_GAIN_4
+44    0x6E4E    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4860    //RX_FDEQ_GAIN_8
+48    0x7468    //RX_FDEQ_GAIN_9
+49    0x6060    //RX_FDEQ_GAIN_10
+50    0x6666    //RX_FDEQ_GAIN_11
+51    0x6666    //RX_FDEQ_GAIN_12
+52    0x6666    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0190    //RX_FENS_RESRV_1
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0028    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0035    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0052    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0078    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7500    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1800    //TX_MIN_EQ_RE_EST_7
+160    0x1800    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x2000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x157C    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0012    //TX_NS_LVL_CTRL_1
+283    0x0017    //TX_NS_LVL_CTRL_2
+284    0x0015    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x000F    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x1000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x2400    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x1000    //TX_A_POST_FILT_S_4
+319    0x3000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x5000    //TX_B_POST_FILT_4
+327    0x3000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7900    //TX_LAMBDA_PFILT_S_1
+341    0x7400    //TX_LAMBDA_PFILT_S_2
+342    0x7900    //TX_LAMBDA_PFILT_S_3
+343    0x7000    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0400    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x5528    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5858    //TX_FDEQ_GAIN_0
+568    0x5850    //TX_FDEQ_GAIN_1
+569    0x5050    //TX_FDEQ_GAIN_2
+570    0x5048    //TX_FDEQ_GAIN_3
+571    0x3C48    //TX_FDEQ_GAIN_4
+572    0x3C48    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4842    //TX_FDEQ_GAIN_7
+575    0x3030    //TX_FDEQ_GAIN_8
+576    0x3030    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D08    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4B4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D08    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C08    //TX_PREEQ_BIN_MIC1_2
+693    0x0700    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x7800    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6800    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0200    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x6590    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x07D0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0800    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0032    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x017E    //TX_NOISE_TH_1
+371    0x0230    //TX_NOISE_TH_2
+372    0x3492    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x55B8    //TX_NOISE_TH_5
+375    0x49E6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x5050    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x5050    //TX_FDEQ_GAIN_6
+574    0x5048    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x3C36    //TX_FDEQ_GAIN_10
+578    0x3A3A    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x5E64    //TX_PREEQ_GAIN_MIC0_12
+630    0x6464    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1104    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x0700    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0BE3    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2F7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7600    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x0600    //TX_MIN_EQ_RE_EST_1
+154    0x3000    //TX_MIN_EQ_RE_EST_2
+155    0x3000    //TX_MIN_EQ_RE_EST_3
+156    0x3000    //TX_MIN_EQ_RE_EST_4
+157    0x3000    //TX_MIN_EQ_RE_EST_5
+158    0x3000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x7800    //TX_MIN_EQ_RE_EST_8
+161    0x7800    //TX_MIN_EQ_RE_EST_9
+162    0x7800    //TX_MIN_EQ_RE_EST_10
+163    0x7800    //TX_MIN_EQ_RE_EST_11
+164    0x7800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x3000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x05DC    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x36B0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
+226    0x6590    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x003C    //TX_NS_LVL_CTRL_1
+283    0x003C    //TX_NS_LVL_CTRL_2
+284    0x0024    //TX_NS_LVL_CTRL_3
+285    0x003C    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x1400    //TX_SNRI_SUP_1
+302    0x1400    //TX_SNRI_SUP_2
+303    0x1400    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x7C00    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x6000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7D00    //TX_LAMBDA_PFILT_S_0
+340    0x7D00    //TX_LAMBDA_PFILT_S_1
+341    0x7D00    //TX_LAMBDA_PFILT_S_2
+342    0x7D00    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7D00    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x0100    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x0200    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x36B0    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x2CEC    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x484A    //TX_FDEQ_GAIN_5
+573    0x4E5E    //TX_FDEQ_GAIN_6
+574    0x5C4C    //TX_FDEQ_GAIN_7
+575    0x4C4E    //TX_FDEQ_GAIN_8
+576    0x4844    //TX_FDEQ_GAIN_9
+577    0x4448    //TX_FDEQ_GAIN_10
+578    0x4850    //TX_FDEQ_GAIN_11
+579    0x5C6A    //TX_FDEQ_GAIN_12
+580    0x5A84    //TX_FDEQ_GAIN_13
+581    0x7880    //TX_FDEQ_GAIN_14
+582    0x7F7F    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x484A    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
+626    0x5054    //TX_PREEQ_GAIN_MIC0_9
+627    0x5658    //TX_PREEQ_GAIN_MIC0_10
+628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
+629    0x6474    //TX_PREEQ_GAIN_MIC0_12
+630    0x7870    //TX_PREEQ_GAIN_MIC0_13
+631    0x5C48    //TX_PREEQ_GAIN_MIC0_14
+632    0x383C    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1719    //TX_PREEQ_BIN_MIC0_11
+653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x282C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x251A    //TX_PREEQ_BIN_MIC1_0
+691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
+692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
+693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
+694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
+695    0x0F09    //TX_PREEQ_BIN_MIC1_5
+696    0x0909    //TX_PREEQ_BIN_MIC1_6
+697    0x0908    //TX_PREEQ_BIN_MIC1_7
+698    0x070F    //TX_PREEQ_BIN_MIC1_8
+699    0x1F08    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0920    //TX_PREEQ_BIN_MIC1_11
+702    0x2020    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0xF200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0002    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0E21    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x4B7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0100    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0011    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x50C0    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x4C00    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7C00    //TX_LAMBDA_PFILT_S_2
+342    0x7A00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MINENOISE_MIC0_TH_MTS
+381    0xFFEE    //TX_MINENOISE_MIC0_TH_EXP
+382    0x6000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0xFFF3    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0800    //TX_MU_ARSP_EST
+396    0x00C8    //TX_P_OUTBEAM_MIN_TH
+397    0x0002    //TX_EXTRA_NS_L
+398    0x0800    //TX_EXTRA_NS_A
+399    0x0005    //TX_VR_NOISE_FLOOR_TH
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_RESRV_0
+546    0x59D8    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0070    //TX_BF_LESSCUT_BBIN
+554    0x0070    //TX_BF_LESSCUT_EBIN
+555    0x0010    //TX_POSTBFB0
+556    0x0070    //TX_POSTBFB
+557    0x00B0    //TX_POSTBFE
+558    0x0E66    //TX_SPEECH_SNR_TH
+559    0x0050    //TX_PB_MAX_PRI_SNR_TH
+560    0x770A    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
+824    0x0001    //TX_KS_CONFIG
+825    0x7FFF    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0A98    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+RX
+#TOTAL_CUSTOM_STEP  7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PGA_3
+31    0x0000    //TX_PGA_4
+32    0x0000    //TX_PGA_5
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_PP_RESRV_0
+139    0x2A94    //TX_PP_RESRV_1
+140    0x55F0    //TX_PP_RESRV_2
+141    0x0000    //TX_PP_RESRV_3
+142    0x0000    //TX_PP_RESRV_4
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0000    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF200    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0014    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x000C    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x199A    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x1000    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x6666    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0x0000    //TX_MINENOISE_MIC0_TH_MTS
+381    0x0000    //TX_MINENOISE_MIC0_TH_EXP
+382    0x0000    //TX_MINENOISE_MIC0_S_TH_MTS
+383    0x0000    //TX_MINENOISE_MIC0_S_TH_EXP
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_CSX_ALPHA_0
+392    0x0000    //TX_CSX_ALPHA_1
+393    0x0000    //TX_CSX_ALPHA_2
+394    0x0000    //TX_CSX_ALPHA_3
+395    0x0000    //TX_MU_ARSP_EST
+396    0x0000    //TX_P_OUTBEAM_MIN_TH
+397    0x0000    //TX_EXTRA_NS_L
+398    0x0000    //TX_EXTRA_NS_A
+399    0x0000    //TX_VR_NOISE_FLOOR_TH
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0x0000    //TX_DERVB_LEN_0
+515    0x0000    //TX_DERVB_LEN_1
+516    0x0000    //TX_RHO_DERVB
+517    0x0000    //TX_MIC_INDX_DERVB
+518    0x0000    //TX_MU_DERVB
+519    0x0000    //TX_DR_RESRV_0
+520    0x0000    //TX_DR_RESRV_1
+521    0x0000    //TX_DR_RESRV_2
+522    0x0000    //TX_DR_RESRV_3
+523    0x0000    //TX_DR_RESRV_4
+524    0x0000    //TX_DR_RESRV_5
+525    0x0000    //TX_DR_RESRV_6
+526    0x0000    //TX_DR_RESRV_7
+527    0x0000    //TX_DR_RESRV_8
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_RESRV_0
+546    0x0000    //TX_WNS_RESRV_1
+547    0x0000    //TX_WNS_RESRV_2
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
+553    0x0000    //TX_BF_LESSCUT_BBIN
+554    0x0000    //TX_BF_LESSCUT_EBIN
+555    0x0000    //TX_POSTBFB0
+556    0x0000    //TX_POSTBFB
+557    0x0000    //TX_POSTBFE
+558    0x0000    //TX_SPEECH_SNR_TH
+559    0x0000    //TX_PB_MAX_PRI_SNR_TH
+560    0x0000    //TX_MAX_PRI_SNR_TH_L
+561    0x0000    //TX_PFGAIN
+562    0x0000    //TX_MAINTOREFR_TH
+563    0x0000    //TX_SAM_MARK
+564    0x0000    //TX_PB_RESRV_0
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_KS_NOISEPASTE_FACTOR
+824    0x0000    //TX_KS_CONFIG
+825    0x0000    //TX_KS_GAIN_MIN
+826    0x0000    //TX_KS_RESRV_0
+827    0x0000    //TX_KS_RESRV_1
+828    0x0000    //TX_KS_RESRV_2
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xD99A    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+#RX
+0    0x0040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_FENS_RESRV_0
+26    0x0000    //RX_FENS_RESRV_1
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/felix/tuning/waves/tests/test_config.ini b/audio/felix/tuning/waves/tests/test_config.ini
new file mode 100644
index 0000000..ba12a8e
--- /dev/null
+++ b/audio/felix/tuning/waves/tests/test_config.ini
@@ -0,0 +1,58 @@
+########################################################################################################
+# (Optional) The supported features list for platform vendors to query from.
+# Platform vendors should call maxxaudio_qdsp_is_feature_supported with a string to query from the list.
+# This config has no effect in the MaxxAudioQdspHalController. It's only meaningful for platform vendors.
+# Putting any value other than 1 would be equivalent to not supported.
+########################################################################################################
+[HAL_SUPPORTED_FEATURES]
+CUSTOM_ACTION_256=1
+
+########################################################################################################
+# This defined the options of supported sample rates.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_SAMPLE_RATES]
+SR_COMMON   = 48000
+
+########################################################################################################
+# (Optional) The subtypes that applies to different angles(0, 90, 180, 270). Can be empty if not applicable.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_ORIENTATION_SUBTYPES]
+OST_SPEAKER = 0:12,90:13,180:12,270:0|13
+
+########################################################################################################
+# This defines available preset configurations.
+# This should be configured by Waves only unless platform vendor is familiar with MPS structure.
+########################################################################################################
+[HAL_SUPPORTED_PRESETS]
+SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER
+HEADSET_MUSIC = OM:2,SM:2
+
+########################################################################################################
+# This defines available CONTROL configurations. Only define the CONTROL if you need it.
+# The numbers could vary from device to device.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_CONTROLS]
+SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL
+A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+
+[COEFS_CONVERTER_SETTING]
+AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so
+AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so
+# do not modify the following if not necessary
+#AudioFormatType=0
+#AudioFormatChannels=2
+#AudioFormatSampleRate=48000
+#AudioFormatBitsPerSample=32
+#AudioFormatSampleSize=4
+#AudioFormatIncrement=8
+
+[CUSTOM_ACTION_256]
+CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC
+CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL
+CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC
diff --git a/audio/felix/tuning/waves/tests/test_preset.mps b/audio/felix/tuning/waves/tests/test_preset.mps
new file mode 100644
index 0000000..bd08ee3
Binary files /dev/null and b/audio/felix/tuning/waves/tests/test_preset.mps differ
diff --git a/audio/felix/tuning/waves/waves_config.ini b/audio/felix/tuning/waves/waves_config.ini
new file mode 100644
index 0000000..cf922f6
--- /dev/null
+++ b/audio/felix/tuning/waves/waves_config.ini
@@ -0,0 +1,69 @@
+########################################################################################################
+# (Optional) The supported features list for platform vendors to query from.
+# Platform vendors should call maxxaudio_qdsp_is_feature_supported with a string to query from the list.
+# This config has no effect in the MaxxAudioQdspHalController. It's only meaningful for platform vendors.
+# Putting any value other than 1 would be equivalent to not supported.
+########################################################################################################
+[HAL_SUPPORTED_FEATURES]
+CUSTOM_ACTION_256=0
+CUSTOM_ACTION_257=1
+
+########################################################################################################
+# This defined the options of supported sample rates.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_SAMPLE_RATES]
+SR_COMMON   = 48000
+
+########################################################################################################
+# (Optional) The subtypes that applies to different angles(0, 90, 180, 270). Can be empty if not applicable.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_ORIENTATION_SUBTYPES]
+OST_SPEAKER = 0:12,90:13,180:12,270:0|13
+
+########################################################################################################
+# This defines available preset configurations.
+# This should be configured by Waves only unless platform vendor is familiar with MPS structure.
+########################################################################################################
+[HAL_SUPPORTED_PRESETS]
+SPEAKER_MUSIC_UNFOLDED = OM:1,SM:2,OST:OST_SPEAKER
+SPEAKER_MUSIC_FOLDED = OM:1,SM:2,OST:OST_SPEAKER
+SPEAKER_MUSIC = OM:1,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_MUSIC = OM:10,SM:2,OST:OST_SPEAKER
+SPEAKER_SAFE_CALL = OM:10,SM:2,OST:OST_SPEAKER
+HEADSET_MUSIC = OM:2,SM:2
+
+########################################################################################################
+# This defines available CONTROL configurations. Only define the CONTROL if you need it.
+# The numbers could vary from device to device.
+# This can be configured by Waves or platform vendor.
+########################################################################################################
+[HAL_SUPPORTED_CONTROLS]
+SPEAKER_INSTANCE = INSTANCE:1,DEV:0,SR:SR_COMMON,PRESET:SPEAKER_MUSIC|SPEAKER_SAFE_MUSIC|SPEAKER_SAFE_CALL
+A2DP_INSTANCE = INSTANCE:2,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+USB_HEADPHONE_INSTANCE = INSTANCE:4,DEV:0,SR:SR_COMMON,PRESET:HEADSET_MUSIC
+
+[COEFS_CONVERTER_SETTING]
+AlgFxPath=/vendor/lib/libAlgFx_HiFi3z.so
+AlgFxPath64=/vendor/lib64/libAlgFx_HiFi3z.so
+# do not modify the following if not necessary
+#AudioFormatType=0
+#AudioFormatChannels=2
+#AudioFormatSampleRate=48000
+#AudioFormatBitsPerSample=32
+#AudioFormatSampleSize=4
+#AudioFormatIncrement=8
+
+# CUSTOM_ACTION_LR_MIXED (dev/mode)
+[CUSTOM_ACTION_256]
+CASE_1=PRIORITY:0,NUMBERS:2:0|1,PRESET:SPEAKER_MUSIC
+CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4,PRESET:SPEAKER_SAFE_CALL
+CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1,PRESET:SPEAKER_SAFE_MUSIC
+
+# CUSTOM_ACTION_LR_MIXED_FOLDED (dev/mode/folded)
+[CUSTOM_ACTION_257]
+CASE_1=PRIORITY:0,NUMBERS:2:0|1:0,PRESET:SPEAKER_MUSIC_UNFOLDED
+CASE_2=PRIORITY:1,NUMBERS:1|2|4194304:2|3|4:0|1,PRESET:SPEAKER_SAFE_CALL
+CASE_3=PRIORITY:2,NUMBERS:1|4194304:0|1:0|1,PRESET:SPEAKER_SAFE_MUSIC
+CASE_4=PRIORITY:3,NUMBERS:2:0|1:1,PRESET:SPEAKER_MUSIC_FOLDED
diff --git a/audio/felix/tuning/waves/waves_preset.mps b/audio/felix/tuning/waves/waves_preset.mps
new file mode 100644
index 0000000..a6ba0d4
Binary files /dev/null and b/audio/felix/tuning/waves/waves_preset.mps differ
diff --git a/bluetooth/bt_vendor_overlay.conf b/bluetooth/bt_vendor_overlay.conf
new file mode 100644
index 0000000..9c44fe0
--- /dev/null
+++ b/bluetooth/bt_vendor_overlay.conf
@@ -0,0 +1,4 @@
+# This is BTBCM HAL overlay configuration file.
+
+# Uart port name
+UartPort = /dev/ttySAC18
diff --git a/bluetooth/manifest_bluetooth.xml b/bluetooth/manifest_bluetooth.xml
new file mode 100644
index 0000000..d9a378e
--- /dev/null
+++ b/bluetooth/manifest_bluetooth.xml
@@ -0,0 +1,38 @@
+<manifest version="1.0" type="device">
+    <hal format="hidl">
+        <name>android.hardware.bluetooth</name>
+        <transport>hwbinder</transport>
+        <version>1.1</version>
+        <interface>
+            <name>IBluetoothHci</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>hardware.google.bluetooth.bt_channel_avoidance</name>
+        <transport>hwbinder</transport>
+        <version>1.0</version>
+        <interface>
+            <name>IBTChannelAvoidance</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>hardware.google.bluetooth.sar</name>
+        <transport>hwbinder</transport>
+        <version>1.1</version>
+        <interface>
+            <name>IBluetoothSar</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>hardware.google.bluetooth.ccc</name>
+        <transport>hwbinder</transport>
+        <version>1.0</version>
+        <interface>
+            <name>IBluetoothCcc</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+</manifest>
diff --git a/board-info.txt b/board-info.txt
new file mode 100644
index 0000000..585d210
--- /dev/null
+++ b/board-info.txt
@@ -0,0 +1 @@
+require board=felix
diff --git a/conf/init.felix.rc b/conf/init.felix.rc
new file mode 100644
index 0000000..b146c0a
--- /dev/null
+++ b/conf/init.felix.rc
@@ -0,0 +1,104 @@
+# Felix specific init.rc
+import /vendor/etc/init/hw/init.gs201.rc
+
+on fs
+    chown system system /sys/devices/platform/odm/odm:fp_fpc1020/clk_enable
+    chown system system /sys/devices/platform/odm/odm:fp_fpc1020/hw_reset
+    chown system system /sys/devices/platform/odm/odm:fp_fpc1020/irq
+    chown system system /sys/devices/platform/odm/odm:fp_fpc1020/wakeup_enable
+    exec_background - system shell -- /vendor/bin/trusty_apploader /vendor/firmware/1540.app
+
+# Permissions for hwcomposer
+    chown system system /sys/class/backlight/panel1-backlight/als_table
+    chown system system /sys/class/backlight/panel1-backlight/brightness
+    chown system system /sys/class/backlight/panel1-backlight/dimming_on
+    chown system system /sys/class/backlight/panel1-backlight/hbm_mode
+
+# Touch
+on property:vendor.device.modules.ready=1
+    chown system input /dev/touch_offload_fts
+    chown system input /dev/touch_offload_fts_ext
+    chmod 660 /dev/touch_offload_fts
+    chmod 660 /dev/touch_offload_fts_ext
+    # Start the twoshay touch service
+    start twoshay
+
+# Toggle glove_mode according to touch_sensitivity_mode
+on property:persist.vendor.touch_sensitivity_mode=0 && property:sys.boot_completed=1
+    write /sys/class/spi_master/spi11/spi11.0/glove_mode 00
+    write /sys/class/spi_master/spi6/spi6.0/glove_mode 00
+
+on property:persist.vendor.touch_sensitivity_mode=1 && property:sys.boot_completed=1
+    write /sys/class/spi_master/spi11/spi11.0/glove_mode 01
+    write /sys/class/spi_master/spi6/spi6.0/glove_mode 01
+
+# Load FPC's internal lib
+on init
+    setprop ro.hardware.fingerprint "fpc"
+    # NFC streset tool name
+    setprop persist.vendor.nfc.streset libstreset21
+    setprop persist.vendor.se.streset libstreset21
+
+# When ro.build.flavor=factory_felix-userdebug, add vendor/bin/factory to default path
+on init && property:ro.build.flavor=factory_felix-userdebug
+    export PATH /product/bin:/apex/com.android.runtime/bin:/apex/com.android.art/bin:/system_ext/bin:/system/bin:/system/xbin:/odm/bin:/vendor/bin:/vendor/xbin:/vendor/bin/factory
+
+on early-boot
+    # Wait for insmod_sh to finish all common modules
+    wait_for_prop vendor.common.modules.ready 1
+    start insmod_sh_felix
+
+service insmod_sh_felix /vendor/bin/init.insmod.sh /vendor/etc/init.insmod.felix.cfg
+    class main
+    user root
+    group root system
+    disabled
+    oneshot
+
+on boot && property:ro.build.flavor=factory_felix-userdebug
+    # FTM log folder
+    mkdir /data/ftmlog 0775 system system
+
+    # Audio test folder
+    mkdir /data/AudioTest 0775 system system
+
+on property:vendor.mfgapi.touchpanel.permission=1
+    chmod 0600 /sys/devices/virtual/sec/tsp/cmd
+    chown system system /sys/devices/virtual/sec/tsp/cmd
+
+# Bluetooth
+on post-fs-data
+    chown bluetooth system /proc/bluetooth/timesync
+
+# Fingerprint
+on post-fs-data
+    chown system system /dev/goodix_fp
+    exec_background - system shell -- /vendor/bin/trusty_apploader /vendor/firmware/g7.app
+
+# Overrides fingerprint antispoof if following persist sysprops are set
+on boot && property:ro.build.type=userdebug && \
+           property:persist.vendor.fingerprint.disable.fake.override=0
+    setprop vendor.fingerprint.disable.fake ${persist.vendor.fingerprint.disable.fake.override}
+
+on boot && property:ro.build.type=userdebug && \
+           property:persist.vendor.fingerprint.disable.fake.override=1
+    setprop vendor.fingerprint.disable.fake ${persist.vendor.fingerprint.disable.fake.override}
+
+on boot && property:ro.build.type=userdebug && \
+           property:persist.vendor.fingerprint.disable.fake.override=100
+    setprop vendor.fingerprint.disable.fake ${persist.vendor.fingerprint.disable.fake.override}
+
+# Thermal
+on late-init && property:ro.boot.hardware.revision=DEV1.0
+    setprop vendor.thermal.config "thermal_info_config_proto.json"
+
+on late-init && property:ro.boot.hardware.revision=PROTO1.0
+    setprop vendor.thermal.config "thermal_info_config_proto.json"
+
+# Hall sensor
+on init && property:ro.bootmode=normal
+    write /sys/devices/platform/hall_sensor/enable 0
+
+# SecureElement eSE2 cts mode
+on property:persist.vendor.se.ese2.mode=ctsmode
+    write /sys/class/st33spi/st33spi/st33spi_state 33
diff --git a/conf/init.recovery.device.rc b/conf/init.recovery.device.rc
new file mode 100644
index 0000000..e0de29b
--- /dev/null
+++ b/conf/init.recovery.device.rc
@@ -0,0 +1,9 @@
+import /init.recovery.${ro.board.platform}.rc
+
+# DELETE ME USB BRINGUP b/188672439.  Delete the following two lines after
+# USB is brought up completely.
+on property:sys.usb.state=fastboot
+    write /sys/devices/platform/11210000.usb/dwc3_exynos_otg_b_sess 1
+
+on property:sys.usb.state=adb
+    write /sys/devices/platform/11210000.usb/dwc3_exynos_otg_b_sess 1
diff --git a/device-felix.mk b/device-felix.mk
new file mode 100644
index 0000000..5360dee
--- /dev/null
+++ b/device-felix.mk
@@ -0,0 +1,215 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_KERNEL_DIR ?= device/google/felix-kernel
+TARGET_BOARD_KERNEL_HEADERS := device/google/felix-kernel/kernel-headers
+TARGET_RECOVERY_DEFAULT_ROTATION := ROTATION_RIGHT
+
+$(call inherit-product-if-exists, vendor/google_devices/felix/prebuilts/device-vendor-felix.mk)
+$(call inherit-product-if-exists, vendor/google_devices/gs201/prebuilts/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/gs201/proprietary/device-vendor.mk)
+$(call inherit-product-if-exists, vendor/google_devices/felix/proprietary/felix/device-vendor-felix.mk)
+
+DEVICE_PACKAGE_OVERLAYS += device/google/felix/felix/overlay
+
+include device/google/gs201/device-shipping-common.mk
+include device/google/felix/audio/felix/audio-tables.mk
+include hardware/google/pixel/vibrator/cs40l25/device-stereo-specific-revision.mk
+include hardware/google/pixel/vibrator/cs40l26/device-stereo-specific-revision.mk
+include device/google/gs101/bluetooth/bluetooth.mk
+include device/google/gs201/uwb/uwb.mk
+ifeq ($(filter factory_felix, $(TARGET_PRODUCT)),)
+include device/google/felix/uwb/uwb_calibration.mk
+endif
+
+SOONG_CONFIG_lyric_tuning_product := felix
+SOONG_CONFIG_google3a_config_target_device := felix
+
+BOARD_SEPOLICY_DIRS += \
+    hardware/google/pixel-sepolicy/vibrator/common \
+
+# Init files
+PRODUCT_COPY_FILES += \
+	device/google/felix/conf/init.felix.rc:$(TARGET_COPY_OUT_VENDOR)/etc/init/hw/init.felix.rc
+
+# Recovery files
+PRODUCT_COPY_FILES += \
+	device/google/felix/conf/init.recovery.device.rc:$(TARGET_COPY_OUT_RECOVERY)/root/init.recovery.felix.rc
+
+# insmod files
+PRODUCT_COPY_FILES += \
+	device/google/felix/init.insmod.felix.cfg:$(TARGET_COPY_OUT_VENDOR)/etc/init.insmod.felix.cfg
+
+# Camera
+PRODUCT_COPY_FILES += \
+	device/google/felix/media_profiles_felix.xml:$(TARGET_COPY_OUT_VENDOR)/etc/media_profiles_V1_0.xml
+
+# Display Config
+PRODUCT_COPY_FILES += \
+	device/google/felix/felix/display_colordata_cal1.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_cal1.pb \
+	device/google/felix/felix/display_colordata_dev_cal1.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_colordata_dev_cal1.pb \
+	device/google/felix/felix/display_golden_cal0.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_cal0.pb \
+	device/google/felix/felix/display_golden_cal1.pb:$(TARGET_COPY_OUT_VENDOR)/etc/display_golden_cal1.pb
+
+# NFC
+PRODUCT_COPY_FILES += \
+	frameworks/native/data/etc/android.hardware.nfc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.xml \
+	frameworks/native/data/etc/android.hardware.nfc.hce.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hce.xml \
+	frameworks/native/data/etc/android.hardware.nfc.hcef.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.hcef.xml \
+	frameworks/native/data/etc/com.nxp.mifare.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/com.nxp.mifare.xml \
+	frameworks/native/data/etc/android.hardware.nfc.uicc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.uicc.xml \
+	frameworks/native/data/etc/android.hardware.nfc.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.nfc.ese.xml \
+	device/google/felix/nfc/libnfc-hal-st.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libnfc-hal-st.conf \
+	device/google/felix/nfc/libnfc-nci-felix.conf:$(TARGET_COPY_OUT_PRODUCT)/etc/libnfc-nci.conf
+
+PRODUCT_PACKAGES += \
+	NfcNci \
+	Tag \
+	android.hardware.nfc@1.2-service.st
+
+# SecureElement
+PRODUCT_PACKAGES += \
+	android.hardware.secure_element@1.2-service-gto \
+	android.hardware.secure_element@1.2-service-gto-ese2
+
+PRODUCT_COPY_FILES += \
+	frameworks/native/data/etc/android.hardware.se.omapi.ese.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.ese.xml \
+	frameworks/native/data/etc/android.hardware.se.omapi.uicc.xml:$(TARGET_COPY_OUT_VENDOR)/etc/permissions/android.hardware.se.omapi.uicc.xml \
+	device/google/felix/nfc/libse-gto-hal.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libse-gto-hal.conf \
+	device/google/felix/nfc/libse-gto-hal2.conf:$(TARGET_COPY_OUT_VENDOR)/etc/libse-gto-hal2.conf
+
+DEVICE_MANIFEST_FILE += \
+	device/google/felix/nfc/manifest_nfc.xml \
+	device/google/felix/nfc/manifest_se.xml
+
+# Thermal Config
+PRODUCT_COPY_FILES += \
+	device/google/felix/thermal_info_config_felix.json:$(TARGET_COPY_OUT_VENDOR)/etc/thermal_info_config.json \
+	device/google/felix/thermal_info_config_felix_proto.json:$(TARGET_COPY_OUT_VENDOR)/etc/thermal_info_config_proto.json
+
+# Bluetooth HAL
+DEVICE_MANIFEST_FILE += \
+	device/google/pantah/bluetooth/manifest_bluetooth.xml
+PRODUCT_SOONG_NAMESPACES += \
+        vendor/broadcom/bluetooth
+PRODUCT_PACKAGES += \
+	android.hardware.bluetooth@1.1-service.bcmbtlinux \
+	bt_vendor.conf
+PRODUCT_COPY_FILES += \
+	device/google/pantah/bluetooth/bt_vendor_overlay.conf:$(TARGET_COPY_OUT_VENDOR)/etc/bluetooth/bt_vendor_overlay.conf
+
+# Keymaster HAL
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# Gatekeeper HAL
+#LOCAL_GATEKEEPER_PRODUCT_PACKAGE ?= android.hardware.gatekeeper@1.0-service.software
+
+
+# Gatekeeper
+# PRODUCT_PACKAGES += \
+# 	android.hardware.gatekeeper@1.0-service.software
+
+# Keymint replaces Keymaster
+# PRODUCT_PACKAGES += \
+# 	android.hardware.security.keymint-service
+
+# Keymaster
+#PRODUCT_PACKAGES += \
+#	android.hardware.keymaster@4.0-impl \
+#	android.hardware.keymaster@4.0-service
+
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.0-service.remote
+#PRODUCT_PACKAGES += android.hardware.keymaster@4.1-service.remote
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE := android.hardware.keymaster@4.1-service
+#LOCAL_KEYMASTER_PRODUCT_PACKAGE ?= android.hardware.keymaster@4.1-service
+
+# PRODUCT_PROPERTY_OVERRIDES += \
+# 	ro.hardware.keystore_desede=true \
+# 	ro.hardware.keystore=software \
+# 	ro.hardware.gatekeeper=software
+
+# default BDADDR for EVB only
+PRODUCT_PROPERTY_OVERRIDES += \
+	ro.vendor.bluetooth.evb_bdaddr="22:22:22:33:44:55"
+
+# PowerStats HAL
+PRODUCT_SOONG_NAMESPACES += \
+    device/google/felix/powerstats/felix
+
+# Remove when b/182979111 is resolved.
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.primary_display_orientation=ORIENTATION_90
+
+# Increment the SVN for any official public releases
+PRODUCT_VENDOR_PROPERTIES += \
+    ro.vendor.build.svn=1
+
+# Vibrator HAL
+PRODUCT_PRODUCT_PROPERTIES +=\
+    ro.vendor.vibrator.hal.long.frequency.shift=0
+ACTUATOR_MODEL := luxshare_ict_lt_xlra1906d
+
+# DCK properties based on target
+PRODUCT_PROPERTY_OVERRIDES += \
+    ro.gms.dck.eligible_wcc=3
+
+# Bluetooth SAR test tool
+PRODUCT_PACKAGES_DEBUG += \
+    sar_test
+
+# WirelessCharger
+DEVICE_PRODUCT_COMPATIBILITY_MATRIX_FILE += device/google/gs101/device_framework_matrix_product_wireless.xml
+
+# Bluetooth
+PRODUCT_PRODUCT_PROPERTIES += \
+    persist.bluetooth.a2dp_aac.vbr_supported=true
+
+# Bluetooth HAL
+PRODUCT_PACKAGES += \
+	bt_vendor.conf
+
+# Graphics
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += ro.surface_flinger.enable_frame_rate_override=true
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += debug.sf.set_idle_timer_ms_4619827677550801152=80
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += debug.sf.support_kernel_idle_timer_4619827677550801152=true
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += debug.sf.set_idle_timer_ms_4619827677550801153=1500
+PRODUCT_DEFAULT_PROPERTY_OVERRIDES += debug.sf.support_kernel_idle_timer_4619827677550801153=false
+
+# Voice packs for Text-To-Speech
+PRODUCT_COPY_FILES += \
+	device/google/felix/tts/ja-jp/ja-jp-x-multi-darwinn-wavernn-r27.zvoice:product/tts/google/ja-jp/ja-jp-x-multi-darwinn-wavernn-r27.zvoice\
+	device/google/felix/tts/ja-jp/ja-jp-x-multi-r27.zvoice:product/tts/google/ja-jp/ja-jp-x-multi-r27.zvoice\
+	device/google/felix/tts/ja-jp/ja-jp-x-multi-wavernn-r27.zvoice:product/tts/google/ja-jp/ja-jp-x-multi-wavernn-r27.zvoice\
+	device/google/felix/tts/fr-fr/fr-fr-x-multi-darwinn-wavernn-r27.zvoice:product/tts/google/fr-fr/fr-fr-x-multi-darwinn-wavernn-r27.zvoice\
+	device/google/felix/tts/fr-fr/fr-fr-x-multi-r27.zvoice:product/tts/google/fr-fr/fr-fr-x-multi-r27.zvoice\
+	device/google/felix/tts/fr-fr/fr-fr-x-multi-wavernn-r27.zvoice:product/tts/google/fr-fr/fr-fr-x-multi-wavernn-r27.zvoice\
+	device/google/felix/tts/de-de/de-de-x-multi-darwinn-wavernn-r27.zvoice:product/tts/google/de-de/de-de-x-multi-darwinn-wavernn-r27.zvoice\
+	device/google/felix/tts/de-de/de-de-x-multi-r27.zvoice:product/tts/google/de-de/de-de-x-multi-r27.zvoice\
+	device/google/felix/tts/de-de/de-de-x-multi-wavernn-r27.zvoice:product/tts/google/de-de/de-de-x-multi-wavernn-r27.zvoice\
+	device/google/felix/tts/it-it/it-it-x-multi-r24.zvoice:product/tts/google/it-it/it-it-x-multi-r24.zvoice\
+	device/google/felix/tts/es-es/es-es-x-multi-darwinn-wavernn-r27.zvoice:product/tts/google/es-es/es-es-x-multi-darwinn-wavernn-r27.zvoice\
+	device/google/felix/tts/es-es/es-es-x-multi-r27.zvoice:product/tts/google/es-es/es-es-x-multi-r27.zvoice\
+	device/google/felix/tts/es-es/es-es-x-multi-wavernn-r27.zvoice:product/tts/google/es-es/es-es-x-multi-wavernn-r27.zvoice
+
+# Set zram size
+PRODUCT_VENDOR_PROPERTIES += \
+    vendor.zram.size=3g
+
+# SKU specific RROs
+PRODUCT_PACKAGES += \
+    SettingsOverlayGPQ72
+
+# Trusty liboemcrypto.so
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/felix/prebuilts
diff --git a/factory_felix.mk b/factory_felix.mk
new file mode 100644
index 0000000..477055c
--- /dev/null
+++ b/factory_felix.mk
@@ -0,0 +1,34 @@
+#
+# Copyright 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+TARGET_LINUX_KERNEL_VERSION := 5.10
+
+$(call inherit-product, device/google/gs201/factory_common.mk)
+$(call inherit-product, device/google/felix/device-felix.mk)
+include device/google/felix/audio/felix/factory-audio-tables.mk
+
+PRODUCT_NAME := factory_felix
+PRODUCT_DEVICE := felix
+PRODUCT_MODEL := Factory build on Felix
+PRODUCT_BRAND := Android
+PRODUCT_MANUFACTURER := Google
+
+# default BDADDR for EVB only
+PRODUCT_PROPERTY_OVERRIDES += \
+	ro.vendor.bluetooth.evb_bdaddr="22:22:22:33:44:55"
+
+# Factory binary of camera
+PRODUCT_PACKAGES += fatp_imx363_hat_tool
diff --git a/felix/BoardConfig.mk b/felix/BoardConfig.mk
new file mode 100644
index 0000000..718ec84
--- /dev/null
+++ b/felix/BoardConfig.mk
@@ -0,0 +1,24 @@
+#
+# Copyright (C) 2020 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+TARGET_BOARD_INFO_FILE := device/google/felix/board-info.txt
+TARGET_BOOTLOADER_BOARD_NAME := felix
+TARGET_SCREEN_DENSITY := 420
+BOARD_USES_GENERIC_AUDIO := true
+USES_DEVICE_GOOGLE_FELIX := true
+
+include device/google/gs201/BoardConfig-common.mk
+-include vendor/google_devices/gs201/prebuilts/BoardConfigVendor.mk
+include device/google/felix-sepolicy/felix-sepolicy.mk
diff --git a/felix/display_colordata_cal1.pb b/felix/display_colordata_cal1.pb
new file mode 100644
index 0000000..1bef374
Binary files /dev/null and b/felix/display_colordata_cal1.pb differ
diff --git a/felix/display_colordata_dev_cal1.pb b/felix/display_colordata_dev_cal1.pb
new file mode 100644
index 0000000..bce867a
--- /dev/null
+++ b/felix/display_colordata_dev_cal1.pb
@@ -0,0 +1,2 @@
+
+F

 
*samsung,ea8182200000000000000:generated by offline toolBN/A"'*xD•
*x–
†*x‡¡	*x¢	ç
\ No newline at end of file
diff --git a/felix/display_golden_cal0.pb b/felix/display_golden_cal0.pb
new file mode 100644
index 0000000..c627c02
Binary files /dev/null and b/felix/display_golden_cal0.pb differ
diff --git a/felix/display_golden_cal1.pb b/felix/display_golden_cal1.pb
new file mode 100644
index 0000000..65e860a
Binary files /dev/null and b/felix/display_golden_cal1.pb differ
diff --git a/felix/overlay/frameworks/base/core/res/res/values/config.xml b/felix/overlay/frameworks/base/core/res/res/values/config.xml
new file mode 100644
index 0000000..4a30b76
--- /dev/null
+++ b/felix/overlay/frameworks/base/core/res/res/values/config.xml
@@ -0,0 +1,274 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+/*
+** Copyright 2021, The Android Open Source Project
+**
+** Licensed under the Apache License, Version 2.0 (the "License");
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+**     http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+*/
+-->
+
+<resources xmlns:xliff="urn:oasis:names:tc:xliff:document:1.2">
+    <!-- Flag indicating whether the we should enable the automatic brightness in Settings.
+         Software implementation will be used if config_hardware_auto_brightness_available is not set -->
+    <bool name="config_automatic_brightness_available">true</bool>
+
+    <!-- Minimum screen brightness allowed by the power manager. -->
+    <integer name="config_screenBrightnessDim">6</integer>
+
+    <!-- Minimum screen brightness setting allowed by power manager.
+         The user is forbidden from setting the brightness below this level.  -->
+    <item name="config_screenBrightnessSettingMinimumFloat" format="float" type="dimen">0.0</item>
+
+    <!-- Maximum screen brightness allowed by the power manager.
+         The user is forbidden from setting the brightness above this level. -->
+    <item name="config_screenBrightnessSettingMaximumFloat" format="float" type="dimen">1.0</item>
+
+    <!-- Default screen brightness setting
+         Must be in the range specified by minimum and maximum. -->
+    <item name="config_screenBrightnessSettingDefaultFloat" format="float" type="dimen">0.17293233082</item>
+
+    <!-- The default refresh rate. Pixel 6 manages this using the peak refresh rate setting, so set
+         this value to 0 so it has no effect. -->
+    <integer name="config_defaultRefreshRate">0</integer>
+
+    <!-- The default peak refresh rate. -->
+    <integer name="config_defaultPeakRefreshRate">90</integer>
+
+    <!-- Nonlinear coefficients for maximum panel brightness of 500 nits -->
+    <string-array name="config_reduceBrightColorsCoefficientsNonlinear">
+        <!-- a-coefficient --> <item>-0.4553233597</item>
+        <!-- b-coefficient --> <item>-0.2380196976</item>
+        <!-- y-intercept --> <item>0.9801096801</item>
+    </string-array>
+
+    <!-- Linear coefficients for maximum panel brightness of 500 nits -->
+    <string-array name="config_reduceBrightColorsCoefficients">
+        <!-- a-coefficient --> <item>0.0</item>
+        <!-- b-coefficient --> <item>-0.96</item>
+        <!-- y-intercept --> <item>1.0</item>
+    </string-array>
+
+    <!-- Type of the ambient tap sensor per device posture (defined by WM Jetpack posture).
+         Unspecified values use config_dozeTapSensor -->
+    <string-array name="config_dozeTapSensorPostureMapping" translatable="false">
+        <item></item> <!-- UNKNOWN, don't register for touch if we don't know -->
+        <item>com.google.sensor.single_touch</item> <!-- CLOSED -->
+        <item>com.google.sensor.touch_gesture</item> <!-- HALF_OPENED -->
+        <item>com.google.sensor.touch_gesture</item> <!-- OPENED -->
+      </string-array>
+
+    <!-- Whether the display cutout region of the secondary built-in display should be forced to
+        black in software (to avoid aliasing or emulate a cutout that is not physically existent).
+    -->
+    <bool name="config_fillSecondaryBuiltInDisplayCutout">true</bool>
+
+    <!-- Display cutout configuration -->
+    <string translatable="false" name="config_secondaryBuiltInDisplayCutout">
+        M 505,61
+        a 35,35 0 1 0 70,0 35,35 0 1 0 -70,0
+        Z
+        @left
+    </string>
+
+    <string translatable="false" name="config_secondaryBuiltInDisplayCutoutRectApproximation">
+        M 480,0
+        h 110
+        v 110
+        h -110
+        Z
+        @left
+    </string>
+
+    <!-- Radius of the software rounded corners. -->
+    <dimen name="rounded_corner_radius">25px</dimen>
+
+    <!-- Height of the status bar.
+         Do not read this dimen directly. Use {@link SystemBarUtils#getStatusBarHeight} instead.
+         -->
+    <dimen name="status_bar_height">110px</dimen>
+
+    <!-- Adjustment for software rounded corners since corners aren't perfectly round. -->
+    <dimen name="rounded_corner_radius_adjustment">5px</dimen>
+
+    <!-- Array of light sensor LUX values to define our levels for auto backlight brightness support.
+      The N entries of this array define N  1 zones as follows:
+         Zone 0:        0 <= LUX < array[0]
+         Zone 1:        array[0] <= LUX < array[1]
+         ...
+         Zone N:        array[N - 1] <= LUX < array[N]
+         Zone N + 1     array[N] <= LUX < infinity
+         Must be overridden in platform specific overlays -->
+    <integer-array name="config_autoBrightnessLevels">
+        <item>1</item>
+        <item>2</item>
+        <item>3</item>
+        <item>4</item>
+        <item>8</item>
+        <item>12</item>
+        <item>20</item>
+        <item>33</item>
+        <item>55</item>
+        <item>90</item>
+        <item>148</item>
+        <item>245</item>
+        <item>403</item>
+        <item>665</item>
+        <item>1097</item>
+        <item>1808</item>
+        <item>2981</item>
+        <item>5000</item>
+        <item>10000</item>
+        <item>20000</item>
+    </integer-array>
+
+    <!-- Array of desired screen brightness in nits corresponding to the lux values
+      in the config_autoBrightnessLevels array. As with config_screenBrightnessMinimumNits and
+      config_screenBrightnessMaximumNits, the display brightness is defined as the measured
+      brightness of an all-white image.
+
+      If this is defined then:
+      - config_autoBrightnessLcdBacklightValues should not be defined
+      - config_screenBrightnessNits must be defined
+      - config_screenBrightnessBacklight must be defined
+
+      This array should have size one greater than the size of the config_autoBrightnessLevels
+      array. The brightness values must be non-negative and non-decreasing. This must be
+      overridden in platform specific overlays -->
+    <array name="config_autoBrightnessDisplayValuesNits">
+      <item>5.139055</item>       <!--  0 - 1 -->
+      <item>9.962018965</item>    <!--  1 - 2 -->
+      <item>18.34822964</item>    <!--  2 - 3 -->
+      <item>21.55068128</item>    <!--  3 - 4 -->
+      <item>24.0167788</item>     <!--  4 - 8 -->
+      <item>30.62162162</item>    <!--  8 - 12 -->
+      <item>35.09486396</item>    <!--  12 - 20 -->
+      <item>41.2249643</item>     <!--  20 - 33 -->
+      <item>47.6760716</item>     <!--  33 - 55 -->
+      <item>55.73002427</item>    <!--  55 - 90 -->
+      <item>66.24126116</item>    <!--  90 - 148 -->
+      <item>79.67614115</item>    <!--  148 - 245 -->
+      <item>98.04727274</item>    <!--  245 - 403 -->
+      <item>125.1221991</item>    <!--  403 - 665 -->
+      <item>161.6875093</item>    <!--  665 - 1097 -->
+      <item>208.4885553</item>    <!--  1097 - 1808 -->
+      <item>264.8221315</item>    <!--  1808 - 2981 -->
+      <item>327.8974352</item>    <!--  2981 - 5000 -->
+      <item>401.1676739</item>    <!--  5000 - 10000 -->
+      <item>750.0</item>          <!--  10000 -20000 -->
+      <item>900.0</item>          <!--  20000+ -->
+    </array>
+
+    <!-- Stability requirements in milliseconds for accepting a new brightness level.  This is used
+         for debouncing the light sensor.  Different constants are used to debounce the light sensor
+         when adapting to brighter or darker environments.  This parameter controls how quickly
+         brightness changes occur in response to an observed change in light level that exceeds the
+         hysteresis threshold. -->
+    <integer name="config_autoBrightnessBrighteningLightDebounce">2000</integer>
+    <integer name="config_autoBrightnessDarkeningLightDebounce">4000</integer>
+
+    <!-- Type of the udfps long press sensor. Empty if long press is not supported. -->
+    <string name="config_dozeUdfpsLongPressSensorType" translatable="false">com.google.sensor.long_press</string>
+
+    <!-- MMS user agent string -->
+    <string name="config_mms_user_agent" translatable="false">gb7n6</string>
+    <!-- MMS user agent profile url -->
+    <string name="config_mms_user_agent_profile_url" translatable="false">http://www.gstatic.com/android/sms/GB7N6.xml</string>
+
+    <!-- Type of the quick pickup sensor. Empty if quick pickup is not supported. -->
+    <string name="config_quickPickupSensorType" translatable="false">com.google.sensor.quick_pickup</string>
+
+    <!-- Not allow to switch to higher refresh rate when display brightness setting is
+         equal or less than this value -->
+    <integer-array name="config_brightnessThresholdsOfPeakRefreshRate">
+        <item>7</item> <!-- 33% UI brightness -->
+        <item>9</item> <!-- 40% UI brightness -->
+    </integer-array>
+    <integer-array name="config_ambientThresholdsOfPeakRefreshRate">
+        <item>-1</item>
+        <item>20</item>
+    </integer-array>
+
+    <!-- default refresh rate in the zone defined by birghtness and ambient thresholds -->
+    <integer name="config_defaultRefreshRateInZone">90</integer>
+
+    <!-- The device states (supplied by DeviceStateManager) that should be treated as folded by the
+         display fold controller. -->
+    <integer-array name="config_foldedDeviceStates" translatable="false">
+      <item>0</item> <!-- CLOSED -->
+    </integer-array>
+
+    <!-- Indicates whether to enable an animation when unfolding a device or not -->
+    <bool name="config_unfoldTransitionEnabled">true</bool>
+
+    <!-- Indicates whether to enable hinge angle sensor when using unfold animation -->
+    <bool name="config_unfoldTransitionHingeAngle">true</bool>
+
+    <bool name="config_supportsConcurrentInternalDisplays">false</bool>
+
+    <!-- Radius of the software rounded corners at the top of primary display in its natural
+        orientation. If zero, the value of rounded_corner_radius is used. -->
+    <dimen name="rounded_corner_radius_top">52px</dimen>
+    <!-- For secondary display -->
+    <dimen name="secondary_rounded_corner_radius_top">52px</dimen>
+
+    <!-- Radius of the software rounded corners at the bottom of primary display in its natural
+        orientation. If zero, the value of rounded_corner_radius is used. -->
+    <dimen name="rounded_corner_radius_bottom">48px</dimen>
+    <!-- For secondary display -->
+    <dimen name="secondary_rounded_corner_radius_bottom">48px</dimen>
+
+    <!-- Top adjustment for the software rounded corners since corners are not perfectly
+        round.  This value is used when retrieving the "radius" of the top rounded corner in cases
+        where the exact bezier curve cannot be retrieved.  This value will be subtracted from
+        rounded_corner_radius_top to more accurately provide a "radius" for the top rounded corners.
+         -->
+    <dimen name="rounded_corner_radius_top_adjustment">5px</dimen>
+    <!-- For secondary display -->
+    <dimen name="secondary_rounded_corner_radius_top_adjustment">5px</dimen>
+
+    <!-- Bottom adjustment for the software rounded corners since corners are not perfectly
+        round.  This value is used when retrieving the "radius" of the bottom rounded corner in
+        cases where the exact bezier curve cannot be retrieved.  This value will be subtracted from
+        rounded_corner_radius_bottom to more accurately provide a "radius" for the bottom rounded
+        corners. -->
+    <dimen name="rounded_corner_radius_bottom_adjustment">4px</dimen>
+    <!-- For secondary display -->
+    <dimen name="secondary_rounded_corner_radius_bottom_adjustment">4px</dimen>
+
+    <!-- the number of the max cached processes in the system. -->
+    <integer name="config_customizedMaxCachedProcesses">64</integer>
+
+    <string-array name="config_displayUniqueIdArray" translatable="false">
+        <item>"local:4619827677550801152"</item>
+        <item>"local:4619827677550801153"</item>
+    </string-array>
+
+    <array name="config_sfps_sensor_props_1" translatable="false">
+        <item>"local:4619827677550801152"</item>  <!--displayId -->
+        <item>0</item>                            <!--x (not used) -->
+        <item>510</item>                          <!--y -->
+        <item>0</item>                            <!--radius (not used) -->
+    </array>
+
+    <array name="config_sfps_sensor_props_2" translatable="false">
+        <item>"local:4619827677550801153"</item>  <!--displayId -->
+        <item>0</item>                            <!--x (not used) -->
+        <item>590</item>                          <!--y -->
+        <item>0</item>                            <!--radius (not used) -->
+    </array>
+
+    <array name="config_sfps_sensor_props" translatable="false">
+        <item>@array/config_sfps_sensor_props_1</item>
+        <item>@array/config_sfps_sensor_props_2</item>
+    </array>
+</resources>
diff --git a/felix/overlay/frameworks/base/core/res/res/xml/power_profile.xml b/felix/overlay/frameworks/base/core/res/res/xml/power_profile.xml
new file mode 100644
index 0000000..2fe2aeb
--- /dev/null
+++ b/felix/overlay/frameworks/base/core/res/res/xml/power_profile.xml
@@ -0,0 +1,196 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+**
+** Copyright 2018, The Android Open Source Project
+**
+** Licensed under the Apache License, Version 2.0 (the "License")
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+**     http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+*/
+-->
+<device name="Android">
+    <!-- Number of cores each CPU cluster contains -->
+    <array name="cpu.clusters.cores">
+      <value>4</value> <!-- Cluster 0 has 4 cores (cpu0, cpu1, cpu2, cpu3) -->
+      <value>2</value> <!-- Cluster 1 has 2 cores (cpu4, cpu5) -->
+      <value>2</value> <!-- Cluster 2 has 2 cores (cpu6, cpu7) -->
+    </array>
+
+    <item name="cpu.suspend">4.35</item>
+    <item name="cpu.idle">5.78</item>
+    <item name="cpu.active">2.35</item>
+    <item name="cpu.cluster_power.cluster0">32.58</item>
+    <item name="cpu.cluster_power.cluster1">6.44</item>
+    <item name="cpu.cluster_power.cluster2">0</item>
+
+    <array name="cpu.core_speeds.cluster0">
+      <value>300000</value>
+      <value>574000</value>
+      <value>738000</value>
+      <value>930000</value>
+      <value>1098000</value>
+      <value>1197000</value>
+      <value>1328000</value>
+      <value>1401000</value>
+      <value>1598000</value>
+      <value>1704000</value>
+      <value>1803000</value>
+      <value>1950000</value>
+      <value>2024000</value>
+    </array>
+
+    <array name="cpu.core_speeds.cluster1">
+      <value>400000</value>
+      <value>553000</value>
+      <value>696000</value>
+      <value>799000</value>
+      <value>910000</value>
+      <value>1024000</value>
+      <value>1197000</value>
+      <value>1328000</value>
+      <value>1491000</value>
+      <value>1663000</value>
+      <value>1836000</value>
+      <value>1999000</value>
+      <value>2130000</value>
+      <value>2253000</value>
+    </array>
+
+    <array name="cpu.core_speeds.cluster2">
+      <value>500000</value>
+      <value>851000</value>
+      <value>984000</value>
+      <value>1106000</value>
+      <value>1277000</value>
+      <value>1426000</value>
+      <value>1582000</value>
+      <value>1745000</value>
+      <value>1826000</value>
+      <value>2048000</value>
+      <value>2188000</value>
+      <value>2252000</value>
+      <value>2401000</value>
+      <value>2507000</value>
+      <value>2630000</value>
+    </array>
+
+    <array name="cpu.core_power.cluster0">
+      <value>13.58</value>
+      <value>38.22</value>
+      <value>48.59</value>
+      <value>64.02</value>
+      <value>79.69</value>
+      <value>89.66</value>
+      <value>105.64</value>
+      <value>113.30</value>
+      <value>142.24</value>
+      <value>158.91</value>
+      <value>180.73</value>
+      <value>229.19</value>
+      <value>266.66</value>
+    </array>
+
+    <array name="cpu.core_power.cluster1">
+      <value>59.00</value>
+      <value>87.69</value>
+      <value>114.54</value>
+      <value>134.19</value>
+      <value>157.72</value>
+      <value>184.69</value>
+      <value>229.99</value>
+      <value>264.08</value>
+      <value>316.56</value>
+      <value>375.74</value>
+      <value>450.94</value>
+      <value>529.79</value>
+      <value>603.34</value>
+      <value>684.48</value>
+    </array>
+
+    <array name="cpu.core_power.cluster2">
+      <value>199.11</value>
+      <value>332.32</value>
+      <value>389.40</value>
+      <value>452.85</value>
+      <value>547.22</value>
+      <value>629.93</value>
+      <value>735.84</value>
+      <value>861.23</value>
+      <value>946.15</value>
+      <value>1137.98</value>
+      <value>1318.48</value>
+      <value>1396.56</value>
+      <value>1583.05</value>
+      <value>1811.61</value>
+      <value>2050.00</value>
+    </array>
+
+    <!-- Additional power used when screen is ambient mode -->
+    <item name="ambient.on">32</item>
+
+    <!-- Additional power used when screen is turned on at minimum brightness -->
+    <item name="screen.on">98</item>
+    <!-- Additional power used when screen is at maximum brightness, compared to
+         screen at minimum brightness -->
+    <item name="screen.full">470</item>
+
+    <!-- Average power used by the camera flash module when on -->
+    <item name="camera.flashlight">240.47</item>
+    <!-- Average power use by the camera subsystem for a typical camera
+         application. Intended as a rough estimate for an application running a
+         preview and capturing approximately 10 full-resolution pictures per
+         minute. -->
+    <item name="camera.avg">900</item>
+
+    <!-- Additional power used when video is playing -->
+    <item name="video">25</item>
+    <!-- Additional power used when audio is playing -->
+    <item name="audio">75</item>
+
+    <!-- Cellular modem related values.-->
+    <item name="modem.controller.sleep">0</item>
+    <item name="modem.controller.idle">156</item>
+    <item name="modem.controller.rx">145</item>
+    <array name="modem.controller.tx"> <!-- Strength 0 to 4 -->
+        <value>153</value>
+        <value>212</value>
+        <value>292</value>
+        <value>359</value>
+        <value>471</value>
+    </array>
+    <item name="modem.controller.voltage">3700</item>
+
+    <!-- GPS related values.-->
+    <array name="gps.signalqualitybased"> <!-- Strength 0 to 1 -->
+        <value>23.9</value>
+        <value>21.3</value>
+    </array>
+    <item name="gps.voltage">3700</item>
+
+    <!-- Idle Receive current for wifi radio in mA.-->
+    <item name="wifi.controller.idle">38</item>
+    <!-- Rx current for wifi radio in mA.-->
+    <item name="wifi.controller.rx">98</item>
+    <!-- Tx current for wifi radio in mA-->
+    <item name="wifi.controller.tx">470</item>
+    <!-- Operating voltage for wifi radio in mV.-->
+    <item name="wifi.controller.voltage">3700</item>
+
+    <!-- Idle current for bluetooth in mA.-->
+    <item name="bluetooth.controller.idle">2.2</item>
+    <!-- Rx current for bluetooth in mA.-->
+    <item name="bluetooth.controller.rx">5.8</item>
+    <!-- Tx current for bluetooth in mA-->
+    <item name="bluetooth.controller.tx">20</item>
+    <!-- Operating voltage for bluetooth in mV.-->
+    <item name="bluetooth.controller.voltage">3850</item>
+</device>
+
diff --git a/felix/overlay/frameworks/base/packages/SettingsProvider/res/values/defaults.xml b/felix/overlay/frameworks/base/packages/SettingsProvider/res/values/defaults.xml
new file mode 100644
index 0000000..5a88877
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SettingsProvider/res/values/defaults.xml
@@ -0,0 +1,3 @@
+<resources>
+   <bool name="def_accelerometer_rotation">true</bool>
+</resources>
\ No newline at end of file
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom.xml
new file mode 100644
index 0000000..0dabd1d
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom.xml
@@ -0,0 +1,24 @@
+<!--
+    Copyright (C) 2021 The Android Open Source Project
+
+    You may obtain a copy of the License at
+
+         http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-->
+<vector xmlns:android="http://schemas.android.com/apk/res/android"
+    android:width="96px"
+    android:height="96px"
+    android:viewportWidth="96"
+    android:viewportHeight="96">
+
+    <path
+        android:fillColor="#000000"
+        android:pathData="M 95.998669,0.11350733 C 82.103907,0.2835388 50.979058,0.30117095 48.267995,0.41273606 44.788158,0.55593816 42.085359,0.81683718 39.638767,1.2339459 37.192176,1.6510556 35.970454,1.9557767 33.59823,2.7303906 c -2.372223,0.774615 -4.045255,1.3458298 -8.098104,3.3135809 -4.052849,1.9677515 -6.544162,3.6928584 -8.690675,5.4355675 -2.146512,1.742708 -4.045482,3.811982 -5.400399,5.395177 -1.354918,1.583195 -1.983269,2.490209 -3.170194,4.384046 -1.186925,1.893835 -1.9401662,3.305114 -2.9604802,5.702323 -1.0203139,2.397211 -2.2330053,6.162001 -2.8869584,8.55246 C 1.7374663,37.904003 1.5336961,39.223516 1.181807,41.230164 0.82991714,43.236813 0.66809464,44.450633 0.48709701,47.135928 0.27447934,50.29035 0.57710441,72.985504 0.11350733,95.997716 V 0.11350733 Z" />
+</vector>
+
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom_secondary.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom_secondary.xml
new file mode 100644
index 0000000..0b94bd0
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_bottom_secondary.xml
@@ -0,0 +1,24 @@
+<!--
+    Copyright (C) 2021 The Android Open Source Project
+
+    You may obtain a copy of the License at
+
+         http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-->
+<vector xmlns:android="http://schemas.android.com/apk/res/android"
+    android:width="104px"
+    android:height="104px"
+    android:viewportWidth="104"
+    android:viewportHeight="104">
+
+    <path
+        android:fillColor="#000000"
+        android:pathData="M 104,0 C 86,0.036 61,0.26 51,0.7 48.43,0.82 45.77,1.16 43.81,1.42 41.66,1.7 38.64,2.35 36.36,3.06 34.07,3.77 31.98,4.52 27.59,6.65 23.21,8.79 20.47,10.65 18.19,12.53 c -2.32,1.89 -4.38,4.13 -5.84,5.84 -1.47,1.71 -2.15,2.69 -3.43,4.74 C 7.63,25.16 6.82,26.69 5.71,29.28 4.61,31.88 3.3,35.95 2.59,38.54 1.88,41.13 1.66,42.61 1.28,45 0.9,46.82 0.73,48 0.53,51 0.29,54.45 0.02,78 0,104 V 0 Z" />
+</vector>
+
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top.xml
new file mode 100644
index 0000000..5c11068
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top.xml
@@ -0,0 +1,24 @@
+<!--
+    Copyright (C) 2021 The Android Open Source Project
+
+    You may obtain a copy of the License at
+
+         http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-->
+<vector xmlns:android="http://schemas.android.com/apk/res/android"
+    android:width="100px"
+    android:height="100px"
+    android:viewportWidth="100"
+    android:viewportHeight="100">
+
+    <path
+        android:fillColor="#000000"
+        android:pathData="M 100,0 C 85.508956,0.17732979 53.048408,0.19571896 50.221001,0.31207305 46.59183,0.46142152 43.773042,0.73351963 41.221457,1.1685334 c -2.551585,0.4350138 -3.825736,0.7528147 -6.299762,1.560679 -2.474026,0.8078643 -4.218854,1.4035988 -8.445629,3.4558146 -4.226774,2.0522159 -6.825,3.851373 -9.063628,5.668887 -2.238628,1.817514 -4.219091,3.97561 -5.632154,5.626763 -1.413063,1.651153 -2.0683795,2.5971 -3.3062405,4.572229 C 7.2361825,24.028034 6.4506167,25.499891 5.386517,28 4.3224173,30.500109 3.0576836,34.426502 2.3756668,36.91957 1.69365,39.412638 1.4811349,40.78879 1.1141447,42.881573 0.74715446,44.974356 0.57838666,46.240279 0.38962235,49.04084 0.16788046,52.330665 0.48349133,76 0,100 V 0 Z" />
+</vector>
+
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top_secondary.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top_secondary.xml
new file mode 100644
index 0000000..7731c14
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/drawable/rounded_corner_top_secondary.xml
@@ -0,0 +1,24 @@
+<!--
+    Copyright (C) 2021 The Android Open Source Project
+
+    You may obtain a copy of the License at
+
+         http://www.apache.org/licenses/LICENSE-2.0
+
+    Unless required by applicable law or agreed to in writing, software
+    distributed under the License is distributed on an "AS IS" BASIS,
+    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+    See the License for the specific language governing permissions and
+    limitations under the License.
+-->
+<vector xmlns:android="http://schemas.android.com/apk/res/android"
+    android:width="104px"
+    android:height="104px"
+    android:viewportWidth="104"
+    android:viewportHeight="104">
+
+    <path
+        android:fillColor="#000000"
+        android:pathData="M 104,0 C 86,0 61,0.26 51,0.7 48.43,0.82 45.77,1.16 43.81,1.42 41.66,1.7 38.64,2.35 36.36,3.06 34.07,3.77 31.98,4.52 27.59,6.65 23.21,8.79 20.47,10.65 18.19,12.53 c -2.32,1.89 -4.38,4.13 -5.84,5.84 -1.47,1.71 -2.15,2.69 -3.43,4.74 C 7.63,25.16 6.82,26.69 5.71,29.28 4.61,31.88 3.3,35.95 2.59,38.54 1.88,41.13 1.66,42.61 1.28,45 0.9,46.82 0.73,48 0.53,51 0.29,54.45 0,78 0,104 V 0 Z" />
+</vector>
+
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/values-land/dimen.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/values-land/dimen.xml
new file mode 100644
index 0000000..4c591bb
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/values-land/dimen.xml
@@ -0,0 +1,25 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+ * Copyright (c) 2021, The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+*/
+-->
+<resources>
+    <!-- Landscape, just use the regular values -->
+    <dimen name="status_bar_padding_start">8dp</dimen>
+    <dimen name="status_bar_padding_end">8dp</dimen>
+
+    <!-- the padding on the top of the statusbar (usually 0) -->
+    <dimen name="status_bar_padding_top">0dp</dimen>
+</resources>
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/values-port/dimens.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/values-port/dimens.xml
new file mode 100644
index 0000000..ac08bfc
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/values-port/dimens.xml
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+ * Copyright (c) 2021, The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+*/
+-->
+<resources>
+  <!-- Proportion of the screen height to use to set the maximum height of the bouncer to when
+         the device is in the DEVICE_POSTURE_HALF_OPENED posture, for the PIN/pattern entry. 0 will
+         allow it to use the whole screen space, 0.6 will allow it to use just under half of the
+         screen. -->
+    <item name="half_opened_bouncer_height_ratio" type="dimen" format="float">0.6</item>
+</resources>
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/values-sw600dp/dimens.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/values-sw600dp/dimens.xml
new file mode 100644
index 0000000..1a3f800
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/values-sw600dp/dimens.xml
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+ * Copyright (c) 2021, The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+*/
+-->
+
+<resources>
+  <!-- Normalized location on the screen of the center of the physical usb charger port in portrait
+       mode. -->
+    <item name="physical_charger_port_location_normalized_x" type="dimen" format="float">0.784</item>
+
+    <!-- Location on the screen of the center of the physical fingerprint sensor -->
+    <dimen name="physical_fingerprint_sensor_center_screen_location_x">2208px</dimen>
+</resources>
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/values/config.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
new file mode 100644
index 0000000..45a32eb
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/values/config.xml
@@ -0,0 +1,142 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+/*
+** Copyright 2021, The Android Open Source Project
+**
+** Licensed under the Apache License, Version 2.0 (the "License");
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+**     http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+*/
+-->
+
+<!-- These resources are around just to allow their values to be customized
+     for different hardware and product builds. -->
+<resources>
+    <!-- Type of a sensor that provides a low-power estimate of the desired display
+         brightness, suitable to listen to while the device is asleep (e.g. during
+         always-on display) -->
+    <string name="doze_brightness_sensor_type" translatable="false">com.google.sensor.binned_brightness</string>
+
+    <!-- Doze: can we assume the pickup sensor includes a proximity check? -->
+    <bool name="doze_pickup_performs_proximity_check">true</bool>
+
+    <!-- Doze: whether the double tap sensor reports 2D touch coordinates -->
+    <bool name="doze_double_tap_reports_touch_coordinates">true</bool>
+
+    <!-- Doze: Table that translates sensor values from the doze_brightness_sensor_type sensor
+               to brightness values; -1 means keeping the current brightness. -->
+    <integer-array name="config_doze_brightness_sensor_to_brightness">
+        <item>-1</item> <!-- 0: OFF -->
+        <item>3</item> <!-- 1: NIGHT -->
+        <item>3</item> <!-- 2: LOW -->
+        <item>16</item> <!-- 3: HIGH -->
+        <item>16</item> <!-- 4: SUN -->
+    </integer-array>
+
+    <!-- Doze: Table that translates sensor values from the doze_brightness_sensor_type sensor
+               to an opacity value for a black scrim that is overlaid in AOD1.
+               Valid range is from 0 (transparent) to 255 (opaque).
+               -1 means keeping the current opacity. -->
+    <integer-array name="config_doze_brightness_sensor_to_scrim_opacity">
+        <item>-1</item> <!-- 0: OFF -->
+        <item>133</item> <!-- 1: NIGHT -->
+        <item>0</item> <!-- 2: LOW -->
+        <item>0</item> <!-- 3: HIGH -->
+        <item>0</item> <!-- 4: SUN -->
+    </integer-array>
+
+    <!-- Doze: Name of a sensor per posture state that provides a low-power estimate of the desired
+               display brightness, suitable to listen to while the device is asleep (e.g. during
+               always-on display) -->
+    <string-array name="doze_brightness_sensor_name_posture_mapping" translatable="false">
+        <item></item> <!-- UNKNOWN -->
+        <item>Binned Brightness 1 (wake-up)</item> <!-- CLOSED -->
+        <item>Binned Brightness 0 (wake-up)</item> <!-- HALF_OPENED -->
+        <item>Binned Brightness 0 (wake-up)</item> <!-- OPENED -->
+    </string-array>
+
+    <!-- Override value to use for proximity sensor. By default, don't register for prox if nothing
+         is specified in the prox_sensor_posture_mapping. -->
+    <string name="proximity_sensor_type" translatable="false"></string>
+
+    <!-- Sensor type per posture state to use for proximity sensor -->
+    <string-array name="proximity_sensor_posture_mapping" translatable="false">
+        <item></item> <!-- UNKNOWN, don't register for prox -->
+        <item>android.sensor.light</item> <!-- CLOSED, register for ALS before checking prox -->
+        <item></item> <!-- HALF_OPENED, don't register for prox -->
+        <item></item> <!-- OPENED, don't register for prox -->
+      </string-array>
+
+    <!-- If using proximity_sensor_type, specifies a threshold value to distinguish near and
+         far break points. A sensor value less than this is considered "near". -->
+    <item name="proximity_sensor_threshold" translatable="false" format="float" type="dimen">12</item>
+
+    <!-- If using proximity_sensor_type, specifies a threshold value to distinguish near and
+         far break points. A sensor value more than this is considered "far". If not set,
+         proximity_sensor_threshold is used. This allows one to implement a latching mechanism for
+         noisy sensors. -->
+    <item name="proximity_sensor_threshold_latch" translatable="false" format="float" type="dimen">24</item>
+
+    <!-- By default, don't register for a secondary prox sensor if nothing is specified in the
+         proximity_sensor_secondary_threshold-->
+    <string name="proximity_sensor_secondary_type" translatable="false"></string>
+
+    <item name="proximity_sensor_secondary_threshold" translatable="false" format="float"
+      type="dimen">5</item>
+
+    <!-- Sensor type per posture state to use for proximity sensor as a confirmation for
+    proximity_sensor_type. -->
+    <string-array name="proximity_sensor_secondary_posture_mapping" translatable="false">
+        <item></item> <!-- UNKNOWN, don't register for prox-->
+        <item>android.sensor.proximity</item> <!-- CLOSED, register for prox -->
+        <item></item> <!-- HALF_OPENED, don't register for prox -->
+        <item></item> <!-- OPENED, don't register for prox -->
+    </string-array>
+
+    <!-- Doze: whether the single tap sensor uses the proximity sensor in the given posture.
+               See doze_single_tap_uses_prox for usage. -->
+    <integer-array name="doze_single_tap_uses_prox_posture_mapping">
+        <item>1</item> <!-- UNKNOWN -->
+        <item>1</item> <!-- CLOSED -->
+        <item>0</item> <!-- HALF_OPENED -->
+        <item>0</item> <!-- OPENED -->
+    </integer-array>
+
+    <!-- Default rounded corner curve (a Bezier). Must match (the curved path in) rounded.xml.
+         Note that while rounded.xml includes the entire path (including the horizontal and vertical
+         corner edges), this pulls out just the curve.
+     -->
+    <string name="config_rounded_mask" translatable="false">M 71,0 C 33,0 22,-1 10,10 -1,22 0,33 0,71</string>
+
+    <!-- Respect drawable/rounded.xml intrinsic size for multiple radius corner path customization -->
+    <bool name="config_roundedCornerMultipleRadius">true</bool>
+    <!-- Respect drawable/rounded_secondary.xml intrinsic size for multiple radius corner path
+         customization for secondary display-->
+    <bool name="config_roundedCornerMultipleRadiusSecondary">true</bool>
+
+    <!-- Configure 13px of extra protection around the front-facing camera -->
+    <string translatable="false" name="config_frontBuiltInDisplayCutoutProtection">
+        M 494,65
+        a 46,46 0 1 0 92,0
+        a 46,46 0 1 0 -92,0
+        Z
+    </string>
+
+    <!-- Camera 1 is the front camera on barbet -->
+    <string translatable="false" name="config_protectedCameraId">1</string>
+
+    <!-- Comma-separated list of packages to exclude from camera protection. In our case,
+    ignore the gaze detection package -->
+    <string translatable="false" name="config_cameraProtectionExcludedPackages">com.google.android.as</string>
+
+    <bool name="config_enableDisplayCutoutProtection">true</bool>
+</resources>
+
diff --git a/felix/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml b/felix/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
new file mode 100644
index 0000000..c668d76
--- /dev/null
+++ b/felix/overlay/frameworks/base/packages/SystemUI/res/values/dimens.xml
@@ -0,0 +1,53 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!--
+ * Copyright (c) 2021, The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+*/
+-->
+<resources>
+    <!-- Don't need the left side padding due to being inset from the cutout -->
+    <dimen name="status_bar_padding_start">0dp</dimen>
+
+   <!-- for 20dp of padding at 3.5px/dp at default density -->
+    <dimen name="rounded_corner_content_padding">50px</dimen>
+
+    <!-- the padding on the top of the statusbar (usually 0) -->
+    <dimen name="status_bar_padding_top">1px</dimen>
+
+    <!-- Padding for the system icons on the keyguard (when no multi user switch is showing).
+    The icons always have a 4dp padding in the container so we only need 56 extra px of padding
+    for the corners -->
+    <dimen name="system_icons_super_container_avatarless_margin_end">11px</dimen>
+
+    <!-- Multi user switch has some intrinsic padding to it -->
+    <dimen name="multi_user_switch_keyguard_margin">40px</dimen>
+
+    <dimen name="keyguard_carrier_text_margin">0px</dimen>
+
+    <dimen name="config_rounded_mask_size">71px</dimen>
+    <dimen name="config_rounded_mask_size_top">71px</dimen>
+    <dimen name="config_rounded_mask_size_bottom">70px</dimen>
+
+    <!-- Location on the screen of the center of the physical power button. -->
+    <dimen name="physical_power_button_center_screen_location_y">650px</dimen>
+
+    <!-- Location on the screen of the center of the physical fingerprint sensor -->
+    <dimen name="physical_fingerprint_sensor_center_screen_location_x">1080px</dimen>
+    <dimen name="physical_fingerprint_sensor_center_screen_location_y">650px</dimen>
+
+    <!-- Location on the screen of the center of the physical volume up/down buttons. -->
+    <dimen name="physical_volume_up_button_center_screen_location_y">950px</dimen>
+    <dimen name="physical_volume_down_button_center_screen_location_y">1110px</dimen>
+
+  </resources>
diff --git a/felix/overlay/packages/apps/Nfc/res/values/config.xml b/felix/overlay/packages/apps/Nfc/res/values/config.xml
new file mode 100644
index 0000000..201f9d1
--- /dev/null
+++ b/felix/overlay/packages/apps/Nfc/res/values/config.xml
@@ -0,0 +1,23 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2021 The Android Open Source Project
+
+     Licensed under the Apache License, Version 2.0 (the "License");
+     you may not use this file except in compliance with the License.
+     You may obtain a copy of the License at
+
+          http://www.apache.org/licenses/LICENSE-2.0
+
+     Unless required by applicable law or agreed to in writing, software
+     distributed under the License is distributed on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+     See the License for the specific language governing permissions and
+     limitations under the License.
+-->
+<resources>
+  <bool name="nfcc_always_on_allowed">true</bool>
+  <string-array name="config_skuSupportsSecureNfc" translatable="false">
+    <item>GFQM1</item>
+    <item>GPQ72</item>
+    <item>GNA8F</item>
+  </string-array>
+</resources>
diff --git a/felix/overlay_packages/SettingsOverlayGPQ72/Android.bp b/felix/overlay_packages/SettingsOverlayGPQ72/Android.bp
new file mode 100644
index 0000000..93a1620
--- /dev/null
+++ b/felix/overlay_packages/SettingsOverlayGPQ72/Android.bp
@@ -0,0 +1,8 @@
+package {
+    default_applicable_licenses: ["Android-Apache-2.0"],
+}
+
+runtime_resource_overlay {
+    name: "SettingsOverlayGPQ72",
+    product_specific: true,
+}
diff --git a/felix/overlay_packages/SettingsOverlayGPQ72/AndroidManifest.xml b/felix/overlay_packages/SettingsOverlayGPQ72/AndroidManifest.xml
new file mode 100644
index 0000000..10bf5a3
--- /dev/null
+++ b/felix/overlay_packages/SettingsOverlayGPQ72/AndroidManifest.xml
@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="utf-8"?>
+<manifest xmlns:android="http://schemas.android.com/apk/res/android"
+    package="com.android.settings.overlay.gpq72">
+    <application android:hasCode="false" />
+    <overlay android:targetPackage="com.android.settings"
+             android:requiredSystemPropertyName="ro.boot.hardware.sku"
+             android:requiredSystemPropertyValue="GPQ72"
+             android:isStatic="true" />
+</manifest>
diff --git a/felix/overlay_packages/SettingsOverlayGPQ72/res/drawable/regulatory_info.png b/felix/overlay_packages/SettingsOverlayGPQ72/res/drawable/regulatory_info.png
new file mode 100644
index 0000000..f2b2358
Binary files /dev/null and b/felix/overlay_packages/SettingsOverlayGPQ72/res/drawable/regulatory_info.png differ
diff --git a/init.insmod.felix.cfg b/init.insmod.felix.cfg
new file mode 100644
index 0000000..b4612cd
--- /dev/null
+++ b/init.insmod.felix.cfg
@@ -0,0 +1,18 @@
+#######################################################
+#           init.insmod.felix.cfg                     #
+# This file contains felix specific kernel modules to #
+# load at init time by init.insmod.sh script          #
+#######################################################
+
+# Load device specific kernel modules
+# Modules here will be loaded *after* all common modules
+modprobe|bcmdhd4389.ko
+modprobe|snd-soc-cs35l41-i2c.ko
+modprobe|haptics-cs40l2x.ko
+modprobe|input-cs40l26-i2c.ko
+modprobe|ftm5.ko
+modprobe|sec_touch.ko
+modprobe|snd-soc-cs40l26.ko
+
+# All device specific modules loaded
+setprop|vendor.device.modules.ready
diff --git a/manifest.xml b/manifest.xml
new file mode 100644
index 0000000..fd1ce3e
--- /dev/null
+++ b/manifest.xml
@@ -0,0 +1,153 @@
+<manifest version="1.0" type="device" target-level="5">
+   <hal format="hidl">
+        <name>android.hardware.audio</name>
+        <transport>hwbinder</transport>
+        <version>7.0</version>
+        <interface>
+            <name>IDevicesFactory</name>
+            <instance>default</instance>
+        </interface>
+   </hal>
+   <hal format="hidl">
+        <name>android.hardware.audio.effect</name>
+        <transport>hwbinder</transport>
+        <version>7.0</version>
+        <interface>
+            <name>IEffectsFactory</name>
+            <instance>default</instance>
+        </interface>
+   </hal>
+   <hal format="hidl">
+        <name>android.hardware.soundtrigger</name>
+        <transport>hwbinder</transport>
+        <version>2.3</version>
+        <interface>
+            <name>ISoundTriggerHw</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.media.omx</name>
+        <transport>hwbinder</transport>
+        <version>1.0</version>
+        <interface>
+            <name>IOmx</name>
+            <instance>default</instance>
+        </interface>
+        <interface>
+            <name>IOmxStore</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.graphics.allocator</name>
+        <transport>hwbinder</transport>
+        <version>4.0</version>
+        <interface>
+            <name>IAllocator</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.graphics.mapper</name>
+        <transport arch="32+64">passthrough</transport>
+        <version>4.0</version>
+        <interface>
+            <name>IMapper</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.graphics.composer</name>
+        <transport>hwbinder</transport>
+        <version>2.4</version>
+        <interface>
+            <name>IComposer</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.renderscript</name>
+        <transport arch="32+64">passthrough</transport>
+        <version>1.0</version>
+        <interface>
+            <name>IDevice</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format = "hidl">
+        <name>android.hardware.dumpstate</name>
+        <transport>hwbinder</transport>
+        <version>1.1</version>
+        <interface>
+            <name>IDumpstateDevice</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.bluetooth.audio</name>
+        <transport>hwbinder</transport>
+        <version>2.1</version>
+        <interface>
+            <name>IBluetoothAudioProvidersFactory</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.boot</name>
+        <transport>hwbinder</transport>
+        <fqname>@1.2::IBootControl/default</fqname>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.neuralnetworks</name>
+        <transport>hwbinder</transport>
+        <version>1.2</version>
+        <interface>
+            <name>IDevice</name>
+            <instance>armnn</instance>
+        </interface>
+        <fqname>@1.2::IDevice/armnn</fqname>
+    </hal>
+    <hal format="hidl">
+       <name>android.hardware.neuralnetworks</name>
+       <transport>hwbinder</transport>
+       <fqname>@1.3::IDevice/google-edgetpu</fqname>
+    </hal>
+    <hal format="hidl">
+       <name>android.hardware.nfc</name>
+       <transport>hwbinder</transport>
+       <version>1.2</version>
+       <interface>
+           <name>INfc</name>
+           <instance>default</instance>
+       </interface>
+    </hal>
+    <hal format="hidl">
+        <name>android.hardware.health</name>
+        <transport>hwbinder</transport>
+        <version>2.1</version>
+        <interface>
+            <name>IHealth</name>
+            <instance>default</instance>
+        </interface>
+    </hal>
+    <hal format="hidl">
+      <name>vendor.google.google_battery</name>
+      <transport>hwbinder</transport>
+      <version>1.1</version>
+      <interface>
+        <name>IGoogleBattery</name>
+        <instance>default</instance>
+      </interface>
+    </hal>
+    <hal format="hidl">
+       <name>vendor.google.whitechapel.audio.audioext</name>
+       <transport>hwbinder</transport>
+       <version>2.0</version>
+       <interface>
+           <name>IAudioExt</name>
+           <instance>default</instance>
+       </interface>
+    </hal>
+    <kernel target-level="6"/>
+</manifest>
diff --git a/media_profiles_felix.xml b/media_profiles_felix.xml
new file mode 100644
index 0000000..338f171
--- /dev/null
+++ b/media_profiles_felix.xml
@@ -0,0 +1,1032 @@
+<?xml version="1.0" encoding="utf-8"?>
+<!-- Copyright (C) 2010 The Android Open Source Project
+
+     Licensed under the Apache License, Version 2.0 (the "License");
+     you may not use this file except in compliance with the License.
+     You may obtain a copy of the License at
+
+          http://www.apache.org/licenses/LICENSE-2.0
+
+     Unless required by applicable law or agreed to in writing, software
+     distributed under the License is distributed on an "AS IS" BASIS,
+     WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+     See the License for the specific language governing permissions and
+     limitations under the License.
+-->
+<!DOCTYPE MediaSettings [
+<!ELEMENT MediaSettings (CamcorderProfiles,
+                         EncoderOutputFileFormat+,
+                         VideoEncoderCap+,
+                         AudioEncoderCap+,
+                         VideoDecoderCap,
+                         AudioDecoderCap)>
+<!ELEMENT CamcorderProfiles (EncoderProfile+, ImageEncoding+, ImageDecoding, Camera)>
+<!ELEMENT EncoderProfile (Video, Audio)>
+<!ATTLIST EncoderProfile quality (high|low) #REQUIRED>
+<!ATTLIST EncoderProfile fileFormat (mp4|3gp) #REQUIRED>
+<!ATTLIST EncoderProfile duration (30|60) #REQUIRED>
+<!ELEMENT Video EMPTY>
+<!ATTLIST Video codec (h264|h263|m4v) #REQUIRED>
+<!ATTLIST Video bitRate CDATA #REQUIRED>
+<!ATTLIST Video width CDATA #REQUIRED>
+<!ATTLIST Video height CDATA #REQUIRED>
+<!ATTLIST Video frameRate CDATA #REQUIRED>
+<!ELEMENT Audio EMPTY>
+<!ATTLIST Audio codec (amrnb|amrwb|aac) #REQUIRED>
+<!ATTLIST Audio bitRate CDATA #REQUIRED>
+<!ATTLIST Audio sampleRate CDATA #REQUIRED>
+<!ATTLIST Audio channels (1|2) #REQUIRED>
+<!ELEMENT ImageEncoding EMPTY>
+<!ATTLIST ImageEncoding quality (90|80|70|60|50|40) #REQUIRED>
+<!ELEMENT ImageDecoding EMPTY>
+<!ATTLIST ImageDecoding memCap CDATA #REQUIRED>
+<!ELEMENT Camera EMPTY>
+<!ATTLIST Camera previewFrameRate CDATA #REQUIRED>
+<!ELEMENT EncoderOutputFileFormat EMPTY>
+<!ATTLIST EncoderOutputFileFormat name (mp4|3gp) #REQUIRED>
+<!ELEMENT VideoEncoderCap EMPTY>
+<!ATTLIST VideoEncoderCap name (hevc|h264|h263|m4v|wmv) #REQUIRED>
+<!ATTLIST VideoEncoderCap enabled (true|false) #REQUIRED>
+<!ATTLIST VideoEncoderCap minBitRate CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap maxBitRate CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap minFrameWidth CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap maxFrameWidth CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap minFrameHeight CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap maxFrameHeight CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap minFrameRate CDATA #REQUIRED>
+<!ATTLIST VideoEncoderCap maxFrameRate CDATA #REQUIRED>
+<!ELEMENT AudioEncoderCap EMPTY>
+<!ATTLIST AudioEncoderCap name (amrnb|amrwb|aac|wma) #REQUIRED>
+<!ATTLIST AudioEncoderCap enabled (true|false) #REQUIRED>
+<!ATTLIST AudioEncoderCap minBitRate CDATA #REQUIRED>
+<!ATTLIST AudioEncoderCap maxBitRate CDATA #REQUIRED>
+<!ATTLIST AudioEncoderCap minSampleRate CDATA #REQUIRED>
+<!ATTLIST AudioEncoderCap maxSampleRate CDATA #REQUIRED>
+<!ATTLIST AudioEncoderCap minChannels (1|2) #REQUIRED>
+<!ATTLIST AudioEncoderCap maxChannels (1|2) #REQUIRED>
+<!ELEMENT VideoDecoderCap EMPTY>
+<!ATTLIST VideoDecoderCap name (wmv) #REQUIRED>
+<!ATTLIST VideoDecoderCap enabled (true|false) #REQUIRED>
+<!ELEMENT AudioDecoderCap EMPTY>
+<!ATTLIST AudioDecoderCap name (wma) #REQUIRED>
+<!ATTLIST AudioDecoderCap enabled (true|false) #REQUIRED>
+]>
+<!--
+     This file is used to declare the multimedia profiles and capabilities
+     on an android-powered device.
+-->
+<MediaSettings>
+    <!-- Each camcorder profile defines a set of predefined configuration parameters -->
+    <CamcorderProfiles cameraId="0">
+
+        <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="72000000"
+                   width="3840"
+                   height="2160"
+                   frameRate="60" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="33000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="60" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="512000"
+                   width="320"
+                   height="240"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
+            <Video codec="h264"
+                   bitRate="128000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="48000000"
+                   width="3840"
+                   height="2160"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="192000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="highspeedlow" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="72000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="240" />
+
+            <!-- audio setting is ignored -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="highspeedhigh" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="72000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="240" />
+
+            <!-- audio setting is ignored -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="highspeed1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="72000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="240" />
+
+            <!-- audio setting is ignored -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <ImageEncoding quality="90" />
+        <ImageEncoding quality="80" />
+        <ImageEncoding quality="70" />
+        <ImageDecoding memCap="20000000" />
+
+    </CamcorderProfiles>
+
+    <CamcorderProfiles cameraId="1">
+
+        <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="512000"
+                   width="320"
+                   height="240"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
+            <Video codec="h264"
+                   bitRate="128000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="192000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <ImageEncoding quality="90" />
+        <ImageEncoding quality="80" />
+        <ImageEncoding quality="70" />
+        <ImageDecoding memCap="20000000" />
+
+    </CamcorderProfiles>
+
+    <CamcorderProfiles cameraId="2">
+
+        <EncoderProfile quality="2160p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="72000000"
+                   width="3840"
+                   height="2160"
+                   frameRate="60" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="33000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="60" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="512000"
+                   width="320"
+                   height="240"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
+            <Video codec="h264"
+                   bitRate="128000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse2160p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="48000000"
+                   width="3840"
+                   height="2160"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="192000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <ImageEncoding quality="90" />
+        <ImageEncoding quality="80" />
+        <ImageEncoding quality="70" />
+        <ImageDecoding memCap="20000000" />
+
+    </CamcorderProfiles>
+
+    <CamcorderProfiles cameraId="3">
+
+        <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="33000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="60" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="512000"
+                   width="320"
+                   height="240"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
+            <Video codec="h264"
+                   bitRate="128000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="192000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <ImageEncoding quality="90" />
+        <ImageEncoding quality="80" />
+        <ImageEncoding quality="70" />
+        <ImageDecoding memCap="20000000" />
+
+    </CamcorderProfiles>
+
+    <CamcorderProfiles cameraId="4">
+
+        <EncoderProfile quality="1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="cif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qvga" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="512000"
+                   width="320"
+                   height="240"
+                   frameRate="30" />
+
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="qcif" fileFormat="3gp" duration="60">
+            <Video codec="h264"
+                   bitRate="128000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse1080p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="22000000"
+                   width="1920"
+                   height="1080"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse720p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="12000000"
+                   width="1280"
+                   height="720"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapse480p" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="6000000"
+                   width="720"
+                   height="480"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapsecif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="1200000"
+                   width="352"
+                   height="288"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="aac"
+                   bitRate="96000"
+                   sampleRate="48000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <EncoderProfile quality="timelapseqcif" fileFormat="mp4" duration="60">
+            <Video codec="h264"
+                   bitRate="192000"
+                   width="176"
+                   height="144"
+                   frameRate="30" />
+
+            <!-- Audio settings are not used for timealpse video recording -->
+            <Audio codec="amrnb"
+                   bitRate="12200"
+                   sampleRate="8000"
+                   channels="1" />
+        </EncoderProfile>
+
+        <ImageEncoding quality="90" />
+        <ImageEncoding quality="80" />
+        <ImageEncoding quality="70" />
+        <ImageDecoding memCap="20000000" />
+
+    </CamcorderProfiles>
+
+    <EncoderOutputFileFormat name="3gp" />
+    <EncoderOutputFileFormat name="mp4" />
+
+    <!--
+         If a codec is not enabled, it is invisible to the applications
+         In other words, the applications won't be able to use the codec
+         or query the capabilities of the codec at all if it is disabled
+    -->
+
+    <!--
+         FIXME : we only check Mpeg4 encorder cap and other codec doesn't check
+                 codec cap
+    -->
+    <VideoEncoderCap name="hevc" enabled="true"
+        minBitRate="64000" maxBitRate="100000000"
+        minFrameWidth="128" maxFrameWidth="3840"
+        minFrameHeight="96" maxFrameHeight="2160"
+        minFrameRate="15" maxFrameRate="30" />
+
+    <VideoEncoderCap name="h264" enabled="true"
+        minBitRate="64000" maxBitRate="100000000"
+        minFrameWidth="128" maxFrameWidth="3840"
+        minFrameHeight="96" maxFrameHeight="2160"
+        minFrameRate="15" maxFrameRate="30" />
+
+    <VideoEncoderCap name="h263" enabled="true"
+        minBitRate="64000" maxBitRate="1000000"
+        minFrameWidth="128" maxFrameWidth="1920"
+        minFrameHeight="96" maxFrameHeight="1080"
+        minFrameRate="15" maxFrameRate="30" />
+
+    <VideoEncoderCap name="m4v" enabled="true"
+        minBitRate="64000" maxBitRate="2000000"
+        minFrameWidth="128" maxFrameWidth="1920"
+        minFrameHeight="96" maxFrameHeight="1080"
+        minFrameRate="15" maxFrameRate="30" />
+
+    <AudioEncoderCap name="aac" enabled="true"
+        minBitRate="758" maxBitRate="288000"
+        minSampleRate="8000" maxSampleRate="48000"
+        minChannels="1" maxChannels="2" />
+
+    <AudioEncoderCap name="heaac" enabled="true"
+        minBitRate="8000" maxBitRate="64000"
+        minSampleRate="16000" maxSampleRate="48000"
+        minChannels="1" maxChannels="2" />
+
+    <AudioEncoderCap name="aaceld" enabled="true"
+        minBitRate="16000" maxBitRate="192000"
+        minSampleRate="16000" maxSampleRate="48000"
+        minChannels="1" maxChannels="2" />
+
+    <AudioEncoderCap name="amrwb" enabled="true"
+        minBitRate="6600" maxBitRate="23050"
+        minSampleRate="16000" maxSampleRate="16000"
+        minChannels="1" maxChannels="1" />
+
+    <AudioEncoderCap name="amrnb" enabled="true"
+        minBitRate="5525" maxBitRate="12200"
+        minSampleRate="8000" maxSampleRate="8000"
+        minChannels="1" maxChannels="1" />
+
+    <!--
+        FIXME:
+        We do not check decoder capabilities at present
+        At present, we only check whether windows media is visible
+        for TEST applications. For other applications, we do
+        not perform any checks at all.
+    -->
+    <VideoDecoderCap name="wmv" enabled="false"/>
+    <AudioDecoderCap name="wma" enabled="false"/>
+</MediaSettings>
diff --git a/nfc/libnfc-hal-st.conf b/nfc/libnfc-hal-st.conf
new file mode 100644
index 0000000..0035a70
--- /dev/null
+++ b/nfc/libnfc-hal-st.conf
@@ -0,0 +1,159 @@
+########################### Start of libnf-hal-st_aosp.conf ###########################
+
+###############################################################################
+###############################################################################
+# ST HAL trace log level
+STNFC_HAL_LOGLEVEL=1
+NFC_DEBUG_ENABLED=0
+
+###############################################################################
+# Vendor specific mode to enable FW (RF & SWP) traces.
+STNFC_FW_DEBUG_ENABLED=0
+
+###############################################################################
+# File used for NFA storage
+NFA_STORAGE="/data/nfc"
+
+###############################################################################
+# Keep the nfa storage file.
+PRESERVE_STORAGE=1
+
+###############################################################################
+# In Switch OFF mode (phone switched-off), specify the desired CE mode to
+# the controller.
+# 0: No card-emulation; DEFAULT
+# 1: Switch-off card-emulation enabled
+CE_ON_SWITCH_OFF_STATE=1
+
+###############################################################################
+# Vendor specific mode to support the USB charging mode if VPSIO=1 in switch off.
+STNFC_USB_CHARGING_MODE=1
+
+###############################################################################
+# Vendor Specific Proprietary Protocol & Discovery Configuration
+# Set to 0xFF if unsupported
+#  byte[0] NCI_PROTOCOL_18092_ACTIVE
+#  byte[1] NCI_PROTOCOL_B_PRIME
+#  byte[2] NCI_PROTOCOL_DUAL
+#  byte[3] NCI_PROTOCOL_15693
+#  byte[4] NCI_PROTOCOL_KOVIO
+#  byte[5] NCI_PROTOCOL_MIFARE
+#  byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
+#  byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
+#  byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
+NFA_PROPRIETARY_CFG={05:FF:FF:06:8A:90:77:FF:FF}
+
+###############################################################################
+# Choose the presence-check algorithm for type-4 tag.  If not defined,
+# the default value is 1.
+# 0  NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
+# 1  NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
+# 2  NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate
+# 3  NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0
+# 4  NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3
+# 5  NFA_RW_PRES_CHK_ISO_DEP_NAK; presence check command ISO-DEP NAK as per NCI2.0
+PRESENCE_CHECK_ALGORITHM=5
+
+###############################################################################
+# Name of the NCI HAL module to use
+# If unset, falls back to nfc_nci.bcm2079x
+NCI_HAL_MODULE="nfc_nci.st21nfc"
+
+###############################################################################
+# White list to be set at startup.
+DEVICE_HOST_WHITE_LIST={02:C0}
+
+###############################################################################
+# BAIL OUT value for P2P
+# Implements algorithm for NFC-DEP protocol priority over ISO-DEP protocol.
+POLL_BAIL_OUT_MODE=1
+
+###############################################################################
+# Extended APDU length for ISO_DEP
+ISO_DEP_MAX_TRANSCEIVE=0xFEFF
+
+###############################################################################
+# Configure the NFC Extras to open and use a static pipe.  If the value is
+# not set or set to 0, then the default is use a dynamic pipe based on a
+# destination gate (see NFA_HCI_DEFAULT_DEST_GATE).  Note there is a value
+# for each EE (ESE/SIM)
+OFF_HOST_ESE_PIPE_ID=0x5E
+OFF_HOST_SIM_PIPE_ID=0x3E
+
+###############################################################################
+#Set the default Felica T3T System Code OffHost route Location :
+#This settings will be used when application does not set this parameter
+# host  0x00
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+DEFAULT_SYS_CODE_ROUTE=0x86
+
+###############################################################################
+#Set the Felica T3T System Code supported power state:
+DEFAULT_SYS_CODE_PWR_STATE=0x3B
+
+###############################################################################
+# Path and Files used for FW update binaries storage
+STNFC_FW_PATH_STORAGE="/vendor/firmware"
+STNFC_FW_BIN_NAME="/st54j_fw.bin"
+STNFC_FW_CONF_NAME="/st54j_conf.bin"
+
+###############################################################################
+# Default off-host route for Felica.
+# This settings will be used when application does not set this parameter
+# host  0x00
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+DEFAULT_NFCF_ROUTE=0x86
+
+###############################################################################
+# Configure the default off-host route.
+# used for technology A and B routing
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+DEFAULT_OFFHOST_ROUTE=0x81
+
+###############################################################################
+# Configure the default AID route.
+# host  0x00
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+DEFAULT_ROUTE=0x00
+
+###############################################################################
+# Configure the NFCEEIDs of offhost UICC.
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+OFFHOST_ROUTE_UICC={81}
+
+###############################################################################
+# Configure the NFCEEIDs of offhost eSEs.
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+OFFHOST_ROUTE_ESE={86}
+
+###############################################################################
+# Configure the list of NFCEE for the ISO-DEP routing.
+# host  0x00
+# eSE   0x82 (eSE),    0x86 (eUICC/SPI-SE)
+# UICC  0x81 (UICC_1), 0x85 (UICC_2)
+DEFAULT_ISODEP_ROUTE=0x81
+
+###############################################################################
+# Configure the HAL Clock control
+# enable  0x01
+# disable 0x00 default value
+STNFC_CONTROL_CLK=0x01
+
+################################################################################
+# Configure the ACTIVE_RW timer
+# Default 0x00, set 0x01 to enable it
+STNFC_ACTIVERW_TIMER=0x01
+
+################################################################################
+# Core configuration settings
+CORE_CONF_PROP={ 20, 02, 0a, 03,
+        a1, 01, 1e,
+        a2, 01, 19,
+        80, 01, 01
+}
+
+
diff --git a/nfc/libnfc-nci-felix.conf b/nfc/libnfc-nci-felix.conf
new file mode 100644
index 0000000..3940b1f
--- /dev/null
+++ b/nfc/libnfc-nci-felix.conf
@@ -0,0 +1,121 @@
+###############################################################################
+# Application options
+NFC_DEBUG_ENABLED=0
+
+###############################################################################
+# File used for NFA storage
+NFA_STORAGE="/data/nfc"
+
+###############################################################################
+# Force UICC to only listen to the following technology(s).
+# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
+# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F
+UICC_LISTEN_TECH_MASK=0x07
+
+###############################################################################
+# Set HOST default listen to the following technology(s).
+# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
+# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F
+# 0x07 = A + B + F
+HOST_LISTEN_TECH_MASK=0x07
+
+###############################################################################
+# AID for Empty Select command
+# If specified, this AID will be substituted when an Empty SELECT command is
+# detected.  The first byte is the length of the AID.  Maximum length is 16.
+AID_FOR_EMPTY_SELECT={08:A0:00:00:01:51:00:00:00}
+
+###############################################################################
+# When screen is turned off, specify the desired power state of the controller.
+# 0: power-off-sleep state; DEFAULT
+# 1: full-power state
+# 2: screen-off card-emulation (CE4/CE3/CE1 modes are used)
+SCREEN_OFF_POWER_STATE=1
+
+###############################################################################
+# Force tag polling for the following technology(s).
+# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
+# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B |
+#            NFA_TECHNOLOGY_MASK_F | NFA_TECHNOLOGY_MASK_ISO15693 |
+#            NFA_TECHNOLOGY_MASK_B_PRIME | NFA_TECHNOLOGY_MASK_KOVIO |
+#            NFA_TECHNOLOGY_MASK_ACTIVE
+#
+# Notable bits:
+# NFA_TECHNOLOGY_MASK_A             0x01    /* NFC Technology A             */
+# NFA_TECHNOLOGY_MASK_B             0x02    /* NFC Technology B             */
+# NFA_TECHNOLOGY_MASK_F             0x04    /* NFC Technology F             */
+# NFA_TECHNOLOGY_MASK_ISO15693      0x08    /* Proprietary Technology       */
+# NFA_TECHNOLOGY_MASK_KOVIO         0x20    /* Proprietary Technology       */
+# NFA_TECHNOLOGY_MASK_ACTIVE        0x40    /* NFC Technology Active        */
+POLLING_TECH_MASK=0x2F
+
+###############################################################################
+# Force P2P to only listen for the following technology(s).
+# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
+# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_F |
+# NFA_TECHNOLOGY_MASK_ACTIVE
+#
+# Notable bits:
+# NFA_TECHNOLOGY_MASK_A             0x01    /* NFC Technology A             */
+# NFA_TECHNOLOGY_MASK_F             0x04    /* NFC Technology F             */
+# NFA_TECHNOLOGY_MASK_ACTIVE         0x40    /* NFC Technology Active        */
+P2P_LISTEN_TECH_MASK=0x00
+
+PRESERVE_STORAGE=0x01
+
+###############################################################################
+# Override the stack default for NFA_EE_MAX_EE_SUPPORTED set in nfc_target.h.
+# The value is set to 3 by default as it assumes we will discover 0xF2,
+# 0xF3, and 0xF4. If a platform will exclude and SE, this value can be reduced
+# so that the stack will not wait any longer than necessary.
+# Maximum EE supported number
+# NXP PN547C2 0x02
+# NXP PN65T 0x03
+# NXP PN548C2 0x02
+# NXP PN66T 0x03
+NFA_MAX_EE_SUPPORTED=0x02
+
+###############################################################################
+# AID_MATCHING constants
+# AID_MATCHING_EXACT_ONLY 0x00
+# AID_MATCHING_EXACT_OR_PREFIX 0x01
+# AID_MATCHING_PREFIX_ONLY 0x02
+# AID_MATCHING_EXACT_OR_SUBSET_OR_PREFIX 0x03
+AID_MATCHING_MODE=0x03
+
+###############################################################################
+#Set the default Felica T3T System Code :
+#This settings will be used when application does not set this parameter
+DEFAULT_SYS_CODE={FE:FE}
+
+###############################################################################
+# Value of NIC parameter NFCC_COFNIG_CONTROL
+# 0x00  NFCC is not allowed to manage RF configuration
+# 0x01  NFCC is allowed to manage RF configuration
+NFCC_CONFIG_CONTROL=0x01
+
+###############################################################################
+#Set if the AID routing should be blocked for the power modes not supported.
+NFA_AID_BLOCK_ROUTE=1
+
+###############################################################################
+#Set the OffHost AID supported power state:
+OFFHOST_AID_ROUTE_PWR_STATE=0x3B
+
+###############################################################################
+# Mifare Tag implementation
+# 0: General implementation
+# 1: Legacy implementation
+LEGACY_MIFARE_READER=0
+
+###############################################################################
+# Nfc recovery implementation
+# 0: Crash Nfc Service
+# 1: Toggle Nfc state
+RECOVERY_OPTION=1
+
+###############################################################################
+# NFCEE Power Supply and Communication Link Control Configuration
+# Set when SetAlwaysOn enabled
+# Default 0x00 when SetAlways on disabled
+ALWAYS_ON_SET_EE_POWER_AND_LINK_CONF=0x03
diff --git a/nfc/libse-gto-hal.conf b/nfc/libse-gto-hal.conf
new file mode 100644
index 0000000..f4e443d
--- /dev/null
+++ b/nfc/libse-gto-hal.conf
@@ -0,0 +1,2 @@
+#Gemalto SPI devnode
+GTO_DEV=/dev/st54spi;
diff --git a/nfc/libse-gto-hal2.conf b/nfc/libse-gto-hal2.conf
new file mode 100644
index 0000000..13ecd54
--- /dev/null
+++ b/nfc/libse-gto-hal2.conf
@@ -0,0 +1,2 @@
+#Gemalto SPI devnode
+GTO_DEV=/dev/st33spi;
diff --git a/nfc/manifest_nfc.xml b/nfc/manifest_nfc.xml
new file mode 100644
index 0000000..bf6b7cc
--- /dev/null
+++ b/nfc/manifest_nfc.xml
@@ -0,0 +1,11 @@
+<manifest version="1.0" type="device">
+  <hal format="hidl">
+    <name>android.hardware.nfc</name>
+    <transport>hwbinder</transport>
+    <version>1.2</version>
+    <interface>
+      <name>INfc</name>
+      <instance>default</instance>
+      </interface>
+  </hal>
+</manifest>
diff --git a/nfc/manifest_se.xml b/nfc/manifest_se.xml
new file mode 100644
index 0000000..60dc4c2
--- /dev/null
+++ b/nfc/manifest_se.xml
@@ -0,0 +1,8 @@
+<manifest version="1.0" type="device">
+  <hal format="hidl">
+    <name>android.hardware.secure_element</name>
+    <transport>hwbinder</transport>
+    <fqname>@1.2::ISecureElement/eSE1</fqname>
+    <fqname>@1.2::ISecureElement/eSE2</fqname>
+  </hal>
+</manifest>
diff --git a/powerstats/felix/Android.bp b/powerstats/felix/Android.bp
new file mode 100644
index 0000000..e3f93cb
--- /dev/null
+++ b/powerstats/felix/Android.bp
@@ -0,0 +1,44 @@
+// Copyright (C) 2021 The Android Open Source Project
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//      http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+soong_namespace {
+    imports: [
+        "hardware/google/pixel",
+        "device/google/gs201",
+    ]
+}
+
+package {
+    // See: http://go/android-license-faq
+    // A large-scale-change added 'default_applicable_licenses' to import
+    // all of the 'license_kinds' from "//device/google/felix:device_google_felix_license"
+    // to get the below license kinds:
+    //   SPDX-license-identifier-Apache-2.0
+    default_applicable_licenses: [
+        "//device/google/felix:device_google_felix_license",
+    ],
+}
+
+cc_binary {
+    name: "android.hardware.power.stats-service.pixel",
+    defaults: ["powerstats_pixel_binary_defaults"],
+
+    srcs: [
+        "*.cpp",
+    ],
+
+    shared_libs: [
+        "android.hardware.power.stats-impl.gs201",
+    ],
+}
diff --git a/powerstats/felix/service.cpp b/powerstats/felix/service.cpp
new file mode 100644
index 0000000..88afbec
--- /dev/null
+++ b/powerstats/felix/service.cpp
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2021 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define LOG_TAG "android.hardware.power.stats-service.pixel"
+
+#include <dataproviders/DisplayStateResidencyDataProvider.h>
+#include <dataproviders/GenericStateResidencyDataProvider.h>
+#include <dataproviders/PowerStatsEnergyConsumer.h>
+#include <Gs201CommonDataProviders.h>
+#include <PowerStatsAidl.h>
+
+#include <android-base/logging.h>
+#include <android-base/properties.h>
+#include <android/binder_manager.h>
+#include <android/binder_process.h>
+#include <log/log.h>
+
+using aidl::android::hardware::power::stats::DisplayStateResidencyDataProvider;
+using aidl::android::hardware::power::stats::EnergyConsumerType;
+using aidl::android::hardware::power::stats::GenericStateResidencyDataProvider;
+using aidl::android::hardware::power::stats::PowerStatsEnergyConsumer;
+
+void addDisplay(std::shared_ptr<PowerStats> p) {
+    // Add display residency stats
+    std::vector<std::string> states = {
+        "Off",
+        "LP: 1440x3120@1"
+        "LP: 1440x3120@10",
+        "LP: 1440x3120@30"
+        "On: 1440x3120@60",
+        "On: 1440x3120@90",
+        "On: 1440x3120@120",
+        "HBM: 1440x3120@60",
+        "HBM: 1440x3120@90",
+        "HBM: 1440x3120@120"};
+
+    p->addStateResidencyDataProvider(std::make_unique<DisplayStateResidencyDataProvider>(
+            "Display",
+            "/sys/class/backlight/panel0-backlight/state",
+            states));
+
+    // Add display energy consumer
+    p->addEnergyConsumer(PowerStatsEnergyConsumer::createMeterAndEntityConsumer(
+            p, EnergyConsumerType::DISPLAY, "display", {"PPVAR_VSYS_PWR_DISP"}, "Display",
+            {{"LP: 1440x3120@1", 1},
+             {"LP: 1440x3120@10", 2},
+             {"LP: 1440x3120@30", 3},
+             {"On: 1440x3120@60", 4},
+             {"On: 1440x3120@90", 5},
+             {"On: 1440x3120@120", 6},
+             {"HBM: 1440x3120@60", 7},
+             {"HBM: 1440x3120@90", 8},
+             {"HBM: 1440x3120@120", 9}}));
+}
+
+void addUwb(std::shared_ptr<PowerStats> p) {
+    // A constant to represent the number of nanoseconds in one millisecond.
+    const int NS_TO_MS = 1000000;
+
+    // ACPM stats are reported in nanoseconds. The transform function
+    // converts nanoseconds to milliseconds.
+    std::function<uint64_t(uint64_t)> uwbNsToMs = [](uint64_t a) { return a / NS_TO_MS; };
+    const GenericStateResidencyDataProvider::StateResidencyConfig stateConfig = {
+            .entryCountSupported = true,
+            .entryCountPrefix = "count:",
+            .totalTimeSupported = true,
+            .totalTimePrefix = "dur ns:",
+            .totalTimeTransform = uwbNsToMs,
+            .lastEntrySupported = false,
+    };
+
+    const std::vector<std::pair<std::string, std::string>> stateHeaders = {
+            std::make_pair("Off", "Off state:"),
+            std::make_pair("Deep sleep", "Deep sleep state:"),
+            std::make_pair("Run", "Run state:"),
+            std::make_pair("Idle", "Idle state:"),
+            std::make_pair("Tx", "Tx state:"),
+            std::make_pair("Rx", "Rx state:"),
+    };
+
+    std::vector<GenericStateResidencyDataProvider::PowerEntityConfig> cfgs;
+    cfgs.emplace_back(generateGenericStateResidencyConfigs(stateConfig, stateHeaders),
+            "UWB", "");
+
+    p->addStateResidencyDataProvider(std::make_unique<GenericStateResidencyDataProvider>(
+            "/sys/devices/platform/10db0000.spi/spi_master/spi16/spi16.0/uwb/power_stats", cfgs));
+}
+
+int main() {
+    LOG(INFO) << "Pixel PowerStats HAL AIDL Service is starting.";
+
+    // single thread
+    ABinderProcess_setThreadPoolMaxThreadCount(0);
+
+    std::shared_ptr<PowerStats> p = ndk::SharedRefBase::make<PowerStats>();
+
+    addGs201CommonDataProviders(p);
+    addDisplay(p);
+    addUwb(p);
+    addNFC(p, "/sys/devices/platform/10970000.hsi2c/i2c-4/i2c-st21nfc/power_stats");
+
+    const std::string instance = std::string() + PowerStats::descriptor + "/default";
+    binder_status_t status = AServiceManager_addService(p->asBinder().get(), instance.c_str());
+    LOG_ALWAYS_FATAL_IF(status != STATUS_OK);
+
+    ABinderProcess_joinThreadPool();
+    return EXIT_FAILURE;  // should not reach
+}
diff --git a/sensors/Android.mk b/sensors/Android.mk
new file mode 100644
index 0000000..4417bc4
--- /dev/null
+++ b/sensors/Android.mk
@@ -0,0 +1,30 @@
+# Copyright (C) 2009 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+LOCAL_PATH := $(call my-dir)
+
+# HAL module implemenation stored in
+# hw/<SENSORS_HARDWARE_MODULE_ID>.<ro.hardware>.so
+include $(CLEAR_VARS)
+
+LOCAL_MODULE_RELATIVE_PATH := hw
+LOCAL_SHARED_LIBRARIES := liblog libcutils libhardware
+LOCAL_SRC_FILES := sensors_dummy.c
+LOCAL_MODULE := sensors.felix
+LOCAL_LICENSE_KINDS := SPDX-license-identifier-Apache-2.0
+LOCAL_LICENSE_CONDITIONS := notice
+LOCAL_NOTICE_FILE := $(LOCAL_PATH)/../NOTICE
+LOCAL_PROPRIETARY_MODULE := true
+
+include $(BUILD_SHARED_LIBRARY)
diff --git a/sensors/sensors_dummy.c b/sensors/sensors_dummy.c
new file mode 100644
index 0000000..b1edd56
--- /dev/null
+++ b/sensors/sensors_dummy.c
@@ -0,0 +1,409 @@
+/*
+ * Copyright (C) 2009 The Android Open Source Project
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* this implements a sensors hardware library for the Android emulator.
+ * the following code should be built as a shared library that will be
+ * placed into /system/lib/hw/sensors.goldfish.so
+ *
+ * it will be loaded by the code in hardware/libhardware/hardware.c
+ * which is itself called from com_android_server_SensorService.cpp
+ */
+
+#define  SENSORS_SERVICE_NAME "sensors"
+
+#define LOG_TAG "Dummy_Sensors"
+
+#include <unistd.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <string.h>
+#include <log/log.h>
+#include <cutils/sockets.h>
+#include <hardware/sensors.h>
+#include <pthread.h>
+
+#if 0
+#define  D(...)  ALOGD(__VA_ARGS__)
+#else
+#define  D(...)  ((void)0)
+#endif
+
+#define  E(...)  ALOGE(__VA_ARGS__)
+
+/** SENSOR IDS AND NAMES
+ **/
+
+#define MAX_NUM_SENSORS 8
+
+#define SUPPORTED_SENSORS  ((1<<MAX_NUM_SENSORS)-1)
+
+#define  ID_BASE           SENSORS_HANDLE_BASE
+#define  ID_ACCELERATION   (ID_BASE+0)
+#define  ID_MAGNETIC_FIELD (ID_BASE+1)
+#define  ID_ORIENTATION    (ID_BASE+2)
+#define  ID_TEMPERATURE    (ID_BASE+3)
+#define  ID_PROXIMITY      (ID_BASE+4)
+#define  ID_LIGHT          (ID_BASE+5)
+#define  ID_PRESSURE       (ID_BASE+6)
+#define  ID_HUMIDITY       (ID_BASE+7)
+
+#define  SENSORS_ACCELERATION    (1 << ID_ACCELERATION)
+#define  SENSORS_MAGNETIC_FIELD  (1 << ID_MAGNETIC_FIELD)
+#define  SENSORS_ORIENTATION     (1 << ID_ORIENTATION)
+#define  SENSORS_TEMPERATURE     (1 << ID_TEMPERATURE)
+#define  SENSORS_PROXIMITY       (1 << ID_PROXIMITY)
+#define  SENSORS_LIGHT           (1 << ID_LIGHT)
+#define  SENSORS_PRESSURE        (1 << ID_PRESSURE)
+#define  SENSORS_HUMIDITY        (1 << ID_HUMIDITY)
+
+#define  ID_CHECK(x)  ((unsigned)((x) - ID_BASE) < MAX_NUM_SENSORS)
+
+#define  SENSORS_LIST  \
+    SENSOR_(ACCELERATION,"acceleration") \
+    SENSOR_(MAGNETIC_FIELD,"magnetic-field") \
+    SENSOR_(ORIENTATION,"orientation") \
+    SENSOR_(TEMPERATURE,"temperature") \
+    SENSOR_(PROXIMITY,"proximity") \
+    SENSOR_(LIGHT, "light") \
+    SENSOR_(PRESSURE, "pressure") \
+    SENSOR_(HUMIDITY, "humidity")
+
+static const struct {
+    const char*  name;
+    int          id; } _sensorIds[MAX_NUM_SENSORS] =
+{
+#define SENSOR_(x,y)  { y, ID_##x },
+    SENSORS_LIST
+#undef  SENSOR_
+};
+
+static const char*
+_sensorIdToName( int  id )
+{
+    int  nn;
+    for (nn = 0; nn < MAX_NUM_SENSORS; nn++)
+        if (id == _sensorIds[nn].id)
+            return _sensorIds[nn].name;
+    return "<UNKNOWN>";
+}
+
+static int
+_sensorIdFromName( const char*  name )
+{
+    int  nn;
+
+    if (name == NULL)
+        return -1;
+
+    for (nn = 0; nn < MAX_NUM_SENSORS; nn++)
+        if (!strcmp(name, _sensorIds[nn].name))
+            return _sensorIds[nn].id;
+
+    return -1;
+}
+
+/* return the current time in nanoseconds */
+static int64_t now_ns(void) {
+    struct timespec  ts;
+    clock_gettime(CLOCK_MONOTONIC, &ts);
+    return (int64_t)ts.tv_sec * 1000000000 + ts.tv_nsec;
+}
+
+/** SENSORS POLL DEVICE
+ **
+ ** This one is used to read sensor data from the hardware.
+ ** We implement this by simply reading the data from the
+ ** emulator through the QEMUD channel.
+ **/
+
+typedef struct SensorDevice {
+    struct sensors_poll_device_1  device;
+    sensors_event_t               sensors[MAX_NUM_SENSORS];
+    uint32_t                      pendingSensors;
+    int64_t                       timeStart;
+    int64_t                       timeOffset;
+    uint32_t                      active_sensors;
+    int                           fd;
+    pthread_mutex_t               lock;
+} SensorDevice;
+
+/* Grab the file descriptor to the emulator's sensors service pipe.
+ * This function returns a file descriptor on success, or -errno on
+ * failure, and assumes the SensorDevice instance's lock is held.
+ *
+ * This is needed because set_delay(), poll() and activate() can be called
+ * from different threads, and poll() is blocking.
+ *
+ * 1) On a first thread, de-activate() all sensors first, then call poll(),
+ *    which results in the thread blocking.
+ *
+ * 2) On a second thread, slightly later, call set_delay() then activate()
+ *    to enable the acceleration sensor.
+ *
+ * The system expects this to unblock the first thread which will receive
+ * new sensor events after the activate() call in 2).
+ *
+ * This cannot work if both threads don't use the same connection.
+ *
+ * TODO(digit): This protocol is brittle, implement another control channel
+ *              for set_delay()/activate()/batch() when supporting HAL 1.3
+ */
+static int sensor_device_get_fd_locked(SensorDevice* dev) {
+    /* Create connection to service on first call */
+    if (dev->fd < 0) {
+	    int ret = -errno;
+	    E("%s: Could not open connection to service: %s", __FUNCTION__,
+	    		    strerror(-ret));
+	    return ret;
+    }
+    return dev->fd;
+}
+
+/* Pick up one pending sensor event. On success, this returns the sensor
+ * id, and sets |*event| accordingly. On failure, i.e. if there are no
+ * pending events, return -EINVAL.
+ *
+ * Note: The device's lock must be acquired.
+ */
+static int sensor_device_pick_pending_event_locked(SensorDevice* d,
+                                                   sensors_event_t*  event)
+{
+    uint32_t mask = SUPPORTED_SENSORS & d->pendingSensors;
+
+    if (mask) {
+        uint32_t i = 31 - __builtin_clz(mask);
+
+	pthread_mutex_lock(&d->lock);
+        d->pendingSensors &= ~(1U << i);
+        *event = d->sensors[i];
+        event->sensor = i;
+        event->version = sizeof(*event);
+	pthread_mutex_unlock(&d->lock);
+        D("%s: %d [%f, %f, %f]", __FUNCTION__,
+                i,
+                event->data[0],
+                event->data[1],
+                event->data[2]);
+        return i;
+    }
+    E("No sensor to return!!! pendingSensors=0x%08x", d->pendingSensors);
+    // we may end-up in a busy loop, slow things down, just in case.
+    usleep(1000);
+    return -EINVAL;
+}
+
+static int sensor_device_close(struct hw_device_t* dev0)
+{
+    SensorDevice* dev = (void*)dev0;
+    // Assume that there are no other threads blocked on poll()
+    if (dev->fd >= 0) {
+        close(dev->fd);
+        dev->fd = -1;
+    }
+    pthread_mutex_destroy(&dev->lock);
+    free(dev);
+    return 0;
+}
+
+/* Return an array of sensor data. This function blocks until there is sensor
+ * related events to report. On success, it will write the events into the
+ * |data| array, which contains |count| items. The function returns the number
+ * of events written into the array, which shall never be greater than |count|.
+ * On error, return -errno code.
+ *
+ * Note that according to the sensor HAL [1], it shall never return 0!
+ *
+ * [1] http://source.android.com/devices/sensors/hal-interface.html
+ */
+static int sensor_device_poll(struct sensors_poll_device_t *dev0,
+                              sensors_event_t* data, int count)
+{
+    return -EIO;
+}
+
+static int sensor_device_activate(struct sensors_poll_device_t *dev0,
+                                  int handle,
+                                  int enabled)
+{
+    SensorDevice* dev = (void*)dev0;
+
+    D("%s: handle=%s (%d) enabled=%d", __FUNCTION__,
+        _sensorIdToName(handle), handle, enabled);
+
+    /* Sanity check */
+    if (!ID_CHECK(handle)) {
+        E("%s: bad handle ID", __FUNCTION__);
+        return -EINVAL;
+    }
+
+    /* Exit early if sensor is already enabled/disabled. */
+    uint32_t mask = (1U << handle);
+    uint32_t sensors = enabled ? mask : 0;
+
+    pthread_mutex_lock(&dev->lock);
+
+    uint32_t active = dev->active_sensors;
+    uint32_t new_sensors = (active & ~mask) | (sensors & mask);
+    uint32_t changed = active ^ new_sensors;
+
+    if (changed)
+	    dev->active_sensors = new_sensors;
+
+    pthread_mutex_unlock(&dev->lock);
+    return 0;
+}
+
+static int sensor_device_default_flush(
+        struct sensors_poll_device_1* dev0,
+        int handle) {
+
+    SensorDevice* dev = (void*)dev0;
+
+    D("%s: handle=%s (%d)", __FUNCTION__,
+        _sensorIdToName(handle), handle);
+
+    /* Sanity check */
+    if (!ID_CHECK(handle)) {
+        E("%s: bad handle ID", __FUNCTION__);
+        return -EINVAL;
+    }
+
+    pthread_mutex_lock(&dev->lock);
+    dev->sensors[handle].version = META_DATA_VERSION;
+    dev->sensors[handle].type = SENSOR_TYPE_META_DATA;
+    dev->sensors[handle].sensor = 0;
+    dev->sensors[handle].timestamp = 0;
+    dev->sensors[handle].meta_data.what = META_DATA_FLUSH_COMPLETE;
+    dev->pendingSensors |= (1U << handle);
+    pthread_mutex_unlock(&dev->lock);
+
+    return 0;
+}
+
+static int sensor_device_set_delay(struct sensors_poll_device_t *dev0,
+                                   int handle __unused,
+                                   int64_t ns)
+{
+    return 0;
+}
+
+static int sensor_device_default_batch(
+     struct sensors_poll_device_1* dev,
+     int sensor_handle,
+     int flags,
+     int64_t sampling_period_ns,
+     int64_t max_report_latency_ns) {
+    return sensor_device_set_delay(dev, sensor_handle, sampling_period_ns);
+}
+
+/** MODULE REGISTRATION SUPPORT
+ **
+ ** This is required so that hardware/libhardware/hardware.c
+ ** will dlopen() this library appropriately.
+ **/
+
+/*
+ * the following is the list of all supported sensors.
+ * this table is used to build sSensorList declared below
+ * according to which hardware sensors are reported as
+ * available from the emulator (see get_sensors_list below)
+ *
+ * note: numerical values for maxRange/resolution/power for
+ *       all sensors but light, pressure and humidity were
+ *       taken from the reference AK8976A implementation
+ */
+static const struct sensor_t sSensorListInit[] = {
+        { .name       = "Accelerometer",
+          .vendor     = "The Android Open Source Project",
+          .version    = 1,
+          .handle     = ID_ACCELERATION,
+          .type       = SENSOR_TYPE_ACCELEROMETER,
+          .maxRange   = 2.8f,
+          .resolution = 1.0f/4032.0f,
+          .power      = 3.0f,
+          .minDelay   = 10000,
+          .maxDelay   = 60 * 1000 * 1000,
+          .fifoReservedEventCount = 0,
+          .fifoMaxEventCount =   0,
+          .stringType =         0,
+          .requiredPermission = 0,
+          .flags = SENSOR_FLAG_CONTINUOUS_MODE,
+          .reserved   = {}
+        },
+};
+
+static struct sensor_t  sSensorList[1];
+
+static int sensors__get_sensors_list(struct sensors_module_t* module __unused,
+        struct sensor_t const** list)
+{
+    *list = sSensorList;
+
+    return 0;
+}
+
+static int
+open_sensors(const struct hw_module_t* module,
+             const char*               name,
+             struct hw_device_t*      *device)
+{
+    int  status = -EINVAL;
+
+    D("%s: name=%s", __FUNCTION__, name);
+
+    if (!strcmp(name, SENSORS_HARDWARE_POLL)) {
+        SensorDevice *dev = malloc(sizeof(*dev));
+
+        memset(dev, 0, sizeof(*dev));
+
+        dev->device.common.tag     = HARDWARE_DEVICE_TAG;
+        dev->device.common.version = SENSORS_DEVICE_API_VERSION_1_3;
+        dev->device.common.module  = (struct hw_module_t*) module;
+        dev->device.common.close   = sensor_device_close;
+        dev->device.poll           = sensor_device_poll;
+        dev->device.activate       = sensor_device_activate;
+        dev->device.setDelay       = sensor_device_set_delay;
+
+        // Version 1.3-specific functions
+        dev->device.batch       = sensor_device_default_batch;
+        dev->device.flush       = sensor_device_default_flush;
+
+        dev->fd = -1;
+        pthread_mutex_init(&dev->lock, NULL);
+
+        *device = &dev->device.common;
+        status  = 0;
+    }
+    return status;
+}
+
+
+static struct hw_module_methods_t sensors_module_methods = {
+    .open = open_sensors
+};
+
+struct sensors_module_t HAL_MODULE_INFO_SYM = {
+    .common = {
+        .tag = HARDWARE_MODULE_TAG,
+        .version_major = 1,
+        .version_minor = 0,
+        .id = SENSORS_HARDWARE_MODULE_ID,
+        .name = "Dummy SENSORS Module",
+        .author = "The Android Open Source Project",
+        .methods = &sensors_module_methods,
+    },
+    .get_sensors_list = sensors__get_sensors_list
+};
diff --git a/thermal_info_config_felix.json b/thermal_info_config_felix.json
new file mode 100644
index 0000000..bcce703
--- /dev/null
+++ b/thermal_info_config_felix.json
@@ -0,0 +1,919 @@
+{
+    "Sensors":[
+        {
+            "Name":"neutral_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "31.5",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "0.9",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/neutral_therm/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"quiet_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"usb_pwr_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"usb_pwr_therm2",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "39.0",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "0.9",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm2/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-NEUTRAL-QUIET-USB-0",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":[
+                "neutral_therm",
+                "quiet_therm",
+                "usb_pwr_therm"
+            ],
+            "Coefficient":[
+                "0.35",
+                "0.15",
+                "0.5"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEUTRAL-QUIET-USB-1",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":[
+                "neutral_therm",
+                "quiet_therm",
+                "usb_pwr_therm"
+            ],
+            "Coefficient":[
+                "0.45",
+                "0.35",
+                "0.15"
+            ],
+            "Offset":1800,
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN",
+            "Type":"SKIN",
+            "VirtualSensor":true,
+            "TriggerSensor":"neutral_therm",
+            "Formula":"MINIMUM",
+            "Combination":[
+                "VIRTUAL-NEUTRAL-QUIET-USB-0",
+                "VIRTUAL-NEUTRAL-QUIET-USB-1"
+            ],
+            "Coefficient":[
+                "1.0",
+                "1.0"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "39.0",
+                "43.0",
+                "45.0",
+                "47.0",
+                "51.0",
+                "55.0"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "SendPowerHint":true,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 1500, 1500, "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 1500, 750, "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 20, 0, "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 10, 0, "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 1000, 0, "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 3500, 1800, "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 2500, 1500, "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 9500, 3000, "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, 0, "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [0.07, 0.07, 0.07, 0.07, 0.07, 0.07, 0.07],
+                    "CdevCeiling": [3, 3, 6, 7, 8, 10, 10],
+                    "LimitInfo": [0, 0, 0, 0, 8, 10, 10],
+                    "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [0.066, 0.066, 0.066, 0.066, 0.066, 0.066, 0.066],
+                    "CdevCeiling": [7, 7, 8, 9, 11, 13, 13],
+                    "LimitInfo": [0, 0, 0, 0, 11, 13, 13],
+                    "BindedPowerRail": "S3M_VDD_CPUCL1",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [0.313, 0.313, 0.313, 0.313, 0.313, 0.313, 0.313],
+                    "CdevCeiling": [11, 11, 14, 14, 14, 16, 16],
+                    "LimitInfo": [0, 0, 0, 0, 14, 16, 16],
+                    "BindedPowerRail": "S2M_VDD_CPUCL2",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "CdevWeightForPID": [0.551, 0.551, 0.551, 0.551, 0.551, 0.551, 0.551],
+                    "CdevCeiling": [7, 7, 8, 9, 10, 11, 11],
+                    "LimitInfo": [0, 0, 0, 0, 10, 11, 11],
+                    "BindedPowerRail": "S2S_VDD_G3D",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 1, 2, 3, 4, 4, 4]
+                },
+                {
+                    "CdevRequest": "fcc",
+                    "LimitInfo": [0, 1, 2, 3, 5, 5, 5]
+                },
+                {
+                    "CdevRequest": "dc_icl",
+                    "LimitInfo": [0, 1, 2, 3, 4, 4, 4]
+                }
+            ]
+        },
+        {
+            "Name":"cellular-emergency",
+            "Type":"POWER_AMPLIFIER",
+            "VirtualSensor":true,
+            "TriggerSensor":"neutral_therm",
+            "Formula":"MINIMUM",
+            "Combination":[
+                "VIRTUAL-NEUTRAL-QUIET-USB-0",
+                "VIRTUAL-NEUTRAL-QUIET-USB-1"
+            ],
+            "Coefficient":[
+                "1.0",
+                "1.0"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "53.0",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "1.9",
+                "0.0"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"USB2-MINUS-USB",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":[
+                "usb_pwr_therm2",
+                "usb_pwr_therm"
+            ],
+            "Coefficient":[
+                "1.0",
+                "-1.0"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-USB-THROTTLING",
+            "Type":"USB_PORT",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor":"usb_pwr_therm2",
+            "Combination":[
+                "usb_pwr_therm2",
+                "USB2-MINUS-USB"
+            ],
+            "Coefficient":[
+                "39000",
+                "7000"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "2.0",
+                "NAN",
+                "NAN"
+            ],
+            "BindedCdevInfo":[
+                {
+                    "CdevRequest": "usbc-port",
+                    "LimitInfo": [0, 0, 0, 0, 1, 1, 1]
+                }
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-USB-UI",
+            "Type":"USB_PORT",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor":"usb_pwr_therm2",
+            "Combination":[
+                "usb_pwr_therm2",
+                "USB2-MINUS-USB"
+            ],
+            "Coefficient":[
+                "39000",
+                "10000"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "2.0",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"battery",
+            "Type":"BATTERY",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "Monitor":false
+        },
+        {
+            "Name":"battery_cycle",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":false
+        },
+        {
+            "Name":"critical-battery-cell",
+            "Type":"BCL_VOLTAGE",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":[
+                "battery",
+                "battery_cycle",
+                "vdroop1"
+            ],
+            "Coefficient":[
+                "-10000",
+                "400",
+                "1000"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                3.00,
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"FLASH_LED_REDUCE",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":[
+                "battery",
+                "battery_cycle",
+                "vdroop1"
+            ],
+            "Coefficient":[
+                "-10000",
+                "400",
+                "1000"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                3.00,
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "SendPowerHint":true
+        },
+        {
+            "Name":"soc",
+            "Type":"BCL_PERCENTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                90,
+                93,
+                96,
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":5000,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 7, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 0, 7, 11]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 0, 4, 5]
+                }
+            ]
+        },
+        {
+            "Name":"batoilo",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                5000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 10, 11, 11]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"vdroop1",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 7, 7, 7]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"vdroop2",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1200,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 15, 15, 15]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"smpl_gm",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1100,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 13, 13, 13]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"ocp_cpu1",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                7000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_cpu2",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_tpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                10500,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_gpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_cpu2",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_cpu1",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                7000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_tpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                8500,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_gpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                9000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        }
+    ],
+    "CoolingDevices":[
+        {
+            "Name":"thermal-cpufreq-0",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote",
+            "State2Power":["412", "352", "308", "236", "212", "176", "152", "116", "76", "56", "24"],
+            "PowerRail":"S4M_VDD_CPUCL0"
+        },
+        {
+            "Name":"thermal-cpufreq-1",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote",
+            "State2Power":["1198", "1018", "854", "696", "566", "452", "356", "296", "226", "188", "152", "124", "90", "58"],
+            "PowerRail":"S3M_VDD_CPUCL1"
+        },
+        {
+            "Name":"thermal-cpufreq-2",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote",
+            "State2Power":["4208", "3692", "3370", "2898", "2562", "2240", "2084", "1780", "1424", "1276", "1042", "858", "714", "560", "448", "364", "166"],
+            "PowerRail":"S2M_VDD_CPUCL2"
+        },
+        {
+            "Name":"thermal-gpufreq-0",
+            "Type":"GPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote",
+            "State2Power":["4371", "3543", "3085", "2293", "1927", "1707", "1394", "1171", "967", "768", "592", "433"],
+            "PowerRail":"S2S_VDD_G3D"
+        },
+        {
+            "Name":"usbc-port",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"fcc",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"dc_icl",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"tpu_cooling",
+            "Type":"NPU",
+            "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote"
+        }
+    ],
+    "PowerRails":[
+        {
+            "Name":"S2M_VDD_CPUCL2",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S3M_VDD_CPUCL1",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S4M_VDD_CPUCL0",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S2S_VDD_G3D",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        }
+    ]
+}
diff --git a/thermal_info_config_felix_proto.json b/thermal_info_config_felix_proto.json
new file mode 100644
index 0000000..c40fdc2
--- /dev/null
+++ b/thermal_info_config_felix_proto.json
@@ -0,0 +1,816 @@
+{
+    "Sensors":[
+        {
+            "Name":"neutral_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "31.5",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "0.9",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/neutral_therm/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"quiet_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"qi_therm2",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/qi_therm2/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"usb_pwr_therm2",
+            "Type":"UNKNOWN",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm2/adc_channel/channel_temp",
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEUTRAL-QUIET-QI2-0",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":[
+                "neutral_therm",
+                "quiet_therm",
+                "qi_therm2"
+            ],
+            "Coefficient":[
+                "0.35",
+                "0.15",
+                "0.5"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-NEUTRAL-QUIET-QI2-1",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":[
+                "neutral_therm",
+                "quiet_therm",
+                "qi_therm2"
+            ],
+            "Coefficient":[
+                "0.45",
+                "0.35",
+                "0.15"
+            ],
+            "Offset":1800,
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN",
+            "Type":"SKIN",
+            "VirtualSensor":true,
+            "TriggerSensor":"neutral_therm",
+            "Formula":"MINIMUM",
+            "Combination":[
+                "VIRTUAL-NEUTRAL-QUIET-QI2-0",
+                "VIRTUAL-NEUTRAL-QUIET-QI2-1"
+            ],
+            "Coefficient":[
+                "1.0",
+                "1.0"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "39.0",
+                "43.0",
+                "45.0",
+                "47.0",
+                "51.0",
+                "55.0"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9",
+                "1.9"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "SendPowerHint":true,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 1500, 1500, "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 1500, 750, "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 20, 0, "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 10, 0, "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 1000, 0, "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 3500, 1800, "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 2500, 1500, "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 9500, 3000, "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 2, 0, "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [0.07, 0.07, 0.07, 0.07, 0.07, 0.07, 0.07],
+                    "CdevCeiling": [3, 3, 6, 7, 8, 10, 10],
+                    "LimitInfo": [0, 0, 0, 0, 8, 10, 10],
+                    "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [0.066, 0.066, 0.066, 0.066, 0.066, 0.066, 0.066],
+                    "CdevCeiling": [7, 7, 8, 9, 11, 13, 13],
+                    "LimitInfo": [0, 0, 0, 0, 11, 13, 13],
+                    "BindedPowerRail": "S3M_VDD_CPUCL1",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [0.313, 0.313, 0.313, 0.313, 0.313, 0.313, 0.313],
+                    "CdevCeiling": [11, 11, 14, 14, 14, 16, 16],
+                    "LimitInfo": [0, 0, 0, 0, 14, 16, 16],
+                    "BindedPowerRail": "S2M_VDD_CPUCL2",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "CdevWeightForPID": [0.551, 0.551, 0.551, 0.551, 0.551, 0.551, 0.551],
+                    "CdevCeiling": [7, 7, 8, 9, 10, 11, 11],
+                    "LimitInfo": [0, 0, 0, 0, 10, 11, 11],
+                    "BindedPowerRail": "S2S_VDD_G3D",
+                    "PowerThreshold": [200, 200, 200, 200, 50, 0, 0],
+                    "ReleaseLogic": "DECREASE"
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 1, 2, 3, 4, 4, 4]
+                },
+                {
+                    "CdevRequest": "fcc",
+                    "LimitInfo": [0, 1, 2, 3, 5, 5, 5]
+                },
+                {
+                    "CdevRequest": "dc_icl",
+                    "LimitInfo": [0, 1, 2, 3, 4, 4, 4]
+                }
+            ]
+        },
+        {
+            "Name":"cellular-emergency",
+            "Type":"POWER_AMPLIFIER",
+            "VirtualSensor":true,
+            "TriggerSensor":"neutral_therm",
+            "Formula":"MINIMUM",
+            "Combination":[
+                "VIRTUAL-NEUTRAL-QUIET-QI2-0",
+                "VIRTUAL-NEUTRAL-QUIET-QI2-1"
+            ],
+            "Coefficient":[
+                "1.0",
+                "1.0"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "53.0",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "0.0",
+                "1.9",
+                "0.0"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"battery",
+            "Type":"BATTERY",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":0.001,
+            "Monitor":false
+        },
+        {
+            "Name":"battery_cycle",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":false
+        },
+        {
+            "Name":"critical-battery-cell",
+            "Type":"BCL_VOLTAGE",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":[
+                "battery",
+                "battery_cycle",
+                "vdroop1"
+            ],
+            "Coefficient":[
+                "-10000",
+                "400",
+                "1000"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                3.00,
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"FLASH_LED_REDUCE",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":[
+                "battery",
+                "battery_cycle",
+                "vdroop1"
+            ],
+            "Coefficient":[
+                "-10000",
+                "400",
+                "1200"
+            ],
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                3.00,
+                "NAN",
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "SendPowerHint":true
+        },
+        {
+            "Name":"soc",
+            "Type":"BCL_PERCENTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                90,
+                93,
+                96,
+                "NAN"
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "PollingDelay":300000,
+            "PassiveDelay":5000,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 7, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 0, 7, 11]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 0, 4, 5]
+                }
+            ]
+        },
+        {
+            "Name":"batoilo",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                5000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 10, 11, 11]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"vdroop1",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 7, 7, 7]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"vdroop2",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1200,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 15, 15, 15]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"smpl_gm",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                1100,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "LimitInfo": [0, 0, 0, 0, 13, 13, 13]
+                },
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
+                }
+	    ]
+        },
+        {
+            "Name":"ocp_cpu1",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                7000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_cpu2",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_tpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                10500,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"ocp_gpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_cpu2",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                12000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_cpu1",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                7000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_tpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                8500,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        },
+        {
+            "Name":"soft_ocp_gpu",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":[
+                "NAN",
+                "NAN",
+                "NAN",
+                "NAN",
+                9000,
+                "NAN",
+                "NAN"
+            ],
+            "HotHysteresis":[
+                0.0,
+                0.0,
+                0.0,
+                0.0,
+                100,
+                0.0,
+                0.0
+            ],
+            "VrThreshold":"NAN",
+            "Multiplier":1,
+            "Monitor":true
+        }
+    ],
+    "CoolingDevices":[
+        {
+            "Name":"thermal-cpufreq-0",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote",
+            "State2Power":["412", "352", "308", "236", "212", "176", "152", "116", "76", "56", "24"],
+            "PowerRail":"S4M_VDD_CPUCL0"
+        },
+        {
+            "Name":"thermal-cpufreq-1",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote",
+            "State2Power":["1198", "1018", "854", "696", "566", "452", "356", "296", "226", "188", "152", "124", "90", "58"],
+            "PowerRail":"S3M_VDD_CPUCL1"
+        },
+        {
+            "Name":"thermal-cpufreq-2",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote",
+            "State2Power":["4208", "3692", "3370", "2898", "2562", "2240", "2084", "1780", "1424", "1276", "1042", "858", "714", "560", "448", "364", "166"],
+            "PowerRail":"S2M_VDD_CPUCL2"
+        },
+        {
+            "Name":"thermal-gpufreq-0",
+            "Type":"GPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote",
+            "State2Power":["4371", "3543", "3085", "2293", "1927", "1707", "1394", "1171", "967", "768", "592", "433"],
+            "PowerRail":"S2S_VDD_G3D"
+        },
+        {
+            "Name":"fcc",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"dc_icl",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"tpu_cooling",
+            "Type":"NPU",
+            "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote"
+        }
+    ],
+    "PowerRails":[
+        {
+            "Name":"S2M_VDD_CPUCL2",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S3M_VDD_CPUCL1",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S4M_VDD_CPUCL0",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        },
+        {
+            "Name":"S2S_VDD_G3D",
+            "PowerSampleDelay":14000,
+            "PowerSampleCount":5
+        }
+    ]
+}
diff --git a/tts/de-de/de-de-x-multi-darwinn-wavernn-r27.zvoice b/tts/de-de/de-de-x-multi-darwinn-wavernn-r27.zvoice
new file mode 100644
index 0000000..174f958
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diff --git a/tts/de-de/de-de-x-multi-r27.zvoice b/tts/de-de/de-de-x-multi-r27.zvoice
new file mode 100644
index 0000000..aceddfe
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diff --git a/tts/de-de/de-de-x-multi-wavernn-r27.zvoice b/tts/de-de/de-de-x-multi-wavernn-r27.zvoice
new file mode 100644
index 0000000..d4b54d6
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diff --git a/tts/es-es/es-es-x-multi-darwinn-wavernn-r27.zvoice b/tts/es-es/es-es-x-multi-darwinn-wavernn-r27.zvoice
new file mode 100644
index 0000000..8bc7604
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diff --git a/tts/es-es/es-es-x-multi-r27.zvoice b/tts/es-es/es-es-x-multi-r27.zvoice
new file mode 100644
index 0000000..cd0c12c
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diff --git a/tts/es-es/es-es-x-multi-wavernn-r27.zvoice b/tts/es-es/es-es-x-multi-wavernn-r27.zvoice
new file mode 100644
index 0000000..3ebcaa5
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diff --git a/tts/fr-fr/fr-fr-x-multi-darwinn-wavernn-r27.zvoice b/tts/fr-fr/fr-fr-x-multi-darwinn-wavernn-r27.zvoice
new file mode 100644
index 0000000..9297b10
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diff --git a/tts/fr-fr/fr-fr-x-multi-r27.zvoice b/tts/fr-fr/fr-fr-x-multi-r27.zvoice
new file mode 100644
index 0000000..a5120b0
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diff --git a/tts/fr-fr/fr-fr-x-multi-wavernn-r27.zvoice b/tts/fr-fr/fr-fr-x-multi-wavernn-r27.zvoice
new file mode 100644
index 0000000..7c00516
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diff --git a/tts/it-it/it-it-x-multi-r24.zvoice b/tts/it-it/it-it-x-multi-r24.zvoice
new file mode 100644
index 0000000..240e7fb
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diff --git a/tts/ja-jp/ja-jp-x-multi-darwinn-wavernn-r27.zvoice b/tts/ja-jp/ja-jp-x-multi-darwinn-wavernn-r27.zvoice
new file mode 100644
index 0000000..97b4f51
Binary files /dev/null and b/tts/ja-jp/ja-jp-x-multi-darwinn-wavernn-r27.zvoice differ
diff --git a/tts/ja-jp/ja-jp-x-multi-r27.zvoice b/tts/ja-jp/ja-jp-x-multi-r27.zvoice
new file mode 100644
index 0000000..651d4ef
Binary files /dev/null and b/tts/ja-jp/ja-jp-x-multi-r27.zvoice differ
diff --git a/tts/ja-jp/ja-jp-x-multi-wavernn-r27.zvoice b/tts/ja-jp/ja-jp-x-multi-wavernn-r27.zvoice
new file mode 100644
index 0000000..66471c1
Binary files /dev/null and b/tts/ja-jp/ja-jp-x-multi-wavernn-r27.zvoice differ
diff --git a/uwb/UWB-calibration.conf b/uwb/UWB-calibration.conf
new file mode 100644
index 0000000..ebfd215
--- /dev/null
+++ b/uwb/UWB-calibration.conf
@@ -0,0 +1,119 @@
+[CCC]format=1
+[CCC]kind=0
+[CCC]settings=1
+[CCC]ant0.ch5.prf64.pdoa_iso_rf2_rf1=0
+[CCC]ant0.ch5.prf64.pdoa_iso_rf1_rf2=0
+[CCC]ant0.ch9.prf64.pdoa_iso_rf2_rf1=0
+[CCC]ant0.ch9.prf64.pdoa_iso_rf1_rf2=0
+[CCC]ant0.ch5.prf64.pdoa_offset=0
+[CCC]ant0.ch9.prf64.pdoa_offset=0
+[CCC]ant0.ch5.prf64.pll_locking_code=0
+[CCC]ant0.ch9.prf64.pll_locking_code=0
+[CCC]id=0
+[CCC]wifi_coex_time_gap=10
+[CCC]ap_coop_mode=1
+[CCC]antenna_selection=4
+[CCC]wifi_coex_min_spacing=0x08
+ant0.ch5.prf16.ant_delay=16450
+ant0.ch5.prf16.tx_power=0
+ant0.ch5.prf16.pg_count=0
+ant0.ch5.prf16.pg_delay=0
+ant0.ch5.prf64.ant_delay=16450
+ant0.ch5.prf64.tx_power=0
+ant0.ch5.prf64.pg_count=0
+ant0.ch5.prf64.pg_delay=0
+ant0.ch9.prf16.ant_delay=16450
+ant0.ch9.prf16.tx_power=0
+ant0.ch9.prf16.pg_count=0
+ant0.ch9.prf16.pg_delay=0
+ant0.ch9.prf64.ant_delay=16450
+ant0.ch9.prf64.tx_power=0
+ant0.ch9.prf64.pg_count=0
+ant0.ch9.prf64.pg_delay=0
+ant0.port=0
+ant0.selector_gpio=7
+ant0.selector_gpio_value=0
+ant1.ch5.prf16.ant_delay=16450
+ant1.ch5.prf16.tx_power=0
+ant1.ch5.prf16.pg_count=0
+ant1.ch5.prf16.pg_delay=0
+ant1.ch5.prf64.ant_delay=16450
+ant1.ch5.prf64.tx_power=0
+ant1.ch5.prf64.pg_count=0
+ant1.ch5.prf64.pg_delay=0
+ant1.ch9.prf16.ant_delay=16450
+ant1.ch9.prf16.tx_power=0
+ant1.ch9.prf16.pg_count=0
+ant1.ch9.prf16.pg_delay=0
+ant1.ch9.prf64.ant_delay=16450
+ant1.ch9.prf64.tx_power=0
+ant1.ch9.prf64.pg_count=0
+ant1.ch9.prf64.pg_delay=0
+ant1.port=0
+ant1.selector_gpio=7
+ant1.selector_gpio_value=1
+ant2.ch5.prf16.ant_delay=16450
+ant2.ch5.prf16.tx_power=0
+ant2.ch5.prf16.pg_count=0
+ant2.ch5.prf16.pg_delay=0
+ant2.ch5.prf64.ant_delay=16450
+ant2.ch5.prf64.tx_power=0
+ant2.ch5.prf64.pg_count=0
+ant2.ch5.prf64.pg_delay=0
+ant2.ch9.prf16.ant_delay=16450
+ant2.ch9.prf16.tx_power=0
+ant2.ch9.prf16.pg_count=0
+ant2.ch9.prf16.pg_delay=0
+ant2.ch9.prf64.ant_delay=16450
+ant2.ch9.prf64.tx_power=0
+ant2.ch9.prf64.pg_count=0
+ant2.ch9.prf64.pg_delay=0
+ant2.port=1
+ant2.selector_gpio=6
+ant2.selector_gpio_value=0
+ant3.ch5.prf16.ant_delay=16450
+ant3.ch5.prf16.tx_power=0
+ant3.ch5.prf16.pg_count=0
+ant3.ch5.prf16.pg_delay=0
+ant3.ch5.prf64.ant_delay=16450
+ant3.ch5.prf64.tx_power=0
+ant3.ch5.prf64.pg_count=0
+ant3.ch5.prf64.pg_delay=0
+ant3.ch9.prf16.ant_delay=16450
+ant3.ch9.prf16.tx_power=0
+ant3.ch9.prf16.pg_count=0
+ant3.ch9.prf16.pg_delay=0
+ant3.ch9.prf64.ant_delay=16450
+ant3.ch9.prf64.tx_power=0
+ant3.ch9.prf64.pg_count=0
+ant3.ch9.prf64.pg_delay=0
+ant3.port=1
+ant3.selector_gpio=6
+ant3.selector_gpio_value=1
+ant0.ant1.ch5.pdoa_offset=0
+ant0.ant1.ch9.pdoa_offset=0
+ant0.ant2.ch5.pdoa_offset=0
+ant0.ant2.ch9.pdoa_offset=0
+ant1.ant2.ch5.pdoa_offset=2173
+ant1.ant2.ch9.pdoa_offset=3555
+ant0.ant3.ch5.pdoa_offset=0
+ant0.ant3.ch9.pdoa_offset=0
+ant1.ant3.ch5.pdoa_offset=3845
+ant1.ant3.ch9.pdoa_offset=647
+ant2.ant3.ch5.pdoa_offset=0
+ant2.ant3.ch9.pdoa_offset=0
+ch5.pll_locking_code=0
+ch9.pll_locking_code=0
+ant1.ant2.ch5.pdoa_lut=3d:ea:7b:0a:66:ea:c3:09:a4:ea:0a:09:cd:ea:66:08:0a:eb:ae:07:33:eb:f6:06:48:eb:52:06:71:eb:9a:05:c3:eb:e1:04:e1:ec:29:04:c3:ef:85:03:a4:f4:cd:02:14:f8:14:02:b8:fa:5c:01:8f:fc:b8:00:e1:fe:00:00:48:01:48:ff:85:03:a4:fe:ae:05:ec:fd:00:08:33:fd:d7:09:7b:fc:85:0b:d7:fb:0a:0d:1f:fb:66:0e:66:fa:33:0f:ae:f9:00:10:0a:f9:a4:10:52:f8:1f:11:9a:f7:5c:11:f6:f6:9a:11:3d:f6:ae:11:85:f5
+ant1.ant2.ch9.pdoa_lut=c3:ed:7b:0a:29:ee:c3:09:3d:ee:0a:09:cd:ee:66:08:c3:ef:ae:07:f6:f0:f6:06:3d:f2:52:06:52:f2:9a:05:cd:f2:e1:04:5c:f3:29:04:c3:f3:85:03:b8:f4:cd:02:71:f7:14:02:52:fa:5c:01:85:fd:b8:00:00:00:00:00:0a:01:48:ff:5c:01:a4:fe:14:02:ec:fd:5c:03:33:fd:48:05:7b:fc:b8:06:d7:fb:14:08:1f:fb:33:09:66:fa:ec:09:ae:f9:3d:0a:0a:f9:0a:0b:52:f8:1f:0b:9a:f7:48:0b:f6:f6:85:0b:3d:f6:9a:0b:85:f5
+ant1.ant3.ch5.pdoa_lut=66:ec:7b:0a:e1:ec:c3:09:14:ee:0a:09:d7:ef:66:08:8f:f2:ae:07:00:f6:f6:06:cd:f6:52:06:33:f7:9a:05:d7:f7:e1:04:48:f9:29:04:33:fd:85:03:d7:fd:cd:02:3d:fe:14:02:ec:ff:5c:01:14:00:b8:00:3d:00:00:00:cd:02:48:ff:29:04:a4:fe:a4:04:ec:fd:85:05:33:fd:e1:06:7b:fc:b8:08:d7:fb:14:0a:1f:fb:e1:0a:66:fa:1f:0b:0a:f9:1f:0b:ae:f9:5c:0b:52:f8:c3:0b:9a:f7:52:0c:f6:f6:0a:0d:3d:f6:00:0e:85:f5
+ant1.ant3.ch9.pdoa_lut=0a:ef:7b:0a:c3:ef:c3:09:00:f0:0a:09:14:f0:66:08:7b:f0:ae:07:48:f1:f6:06:00:f2:52:06:c3:f3:9a:05:00:f6:e1:04:d7:f7:29:04:1f:f9:85:03:ae:f9:cd:02:e1:fa:14:02:e1:fc:5c:01:b8:fe:b8:00:c3:ff:00:00:00:02:48:ff:5c:05:a4:fe:52:08:ec:fd:14:0a:33:fd:e1:0a:7b:fc:14:0c:d7:fb:14:0e:1f:fb:1f:0f:66:fa:00:10:ae:f9:b8:10:0a:f9:29:12:52:f8:00:14:9a:f7:7b:16:f6:f6:d7:17:3d:f6:29:18:85:f5
+xtal_trim=23
+temperature_reference=85
+smart_tx_power=1
+auto_sleep_margin=20000
+[HAL]antenna_pair_azimuth=3
+[HAL]antenna_pair_elevation=4
+[HAL]tx_antenna=0
+[HAL]minimum_system_offset_uwbtime0=300
+restricted_channels=0
diff --git a/uwb/uwb_calibration.mk b/uwb/uwb_calibration.mk
new file mode 100644
index 0000000..d2340e7
--- /dev/null
+++ b/uwb/uwb_calibration.mk
@@ -0,0 +1,21 @@
+#
+# Copyright (C) 2021 The Android Open-Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#      http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+
+LOCAL_UWB_CAL_DIR=device/google/felix/uwb
+
+PRODUCT_COPY_FILES += \
+    $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration.conf \
+    $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration-unknown.conf \
+    $(LOCAL_UWB_CAL_DIR)/UWB-calibration.conf:$(TARGET_COPY_OUT_VENDOR)/etc/UWB-calibration-default.conf \