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gs101:conf Add memlat CPU idle awareness settings

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Test: cat /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware

Bug: 256185411
Signed-off-by: Sophia Wang <yodagump@google.com>
Change-Id: Ic9c8ec3ed7ffe7c3d563115cfa5b36b2fffc978c
This commit is contained in:
Sophia Wang 2022-11-10 09:58:53 -08:00
parent 9257a5f2dc
commit 2eb877f265
1 changed files with 18 additions and 0 deletions
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18
conf/init.gs101.rc
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@ -61,6 +61,14 @@ on init
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/pmu_limit_enable
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
chmod 0220 /proc/vendor_sched/set_task_group_bg
chmod 0220 /proc/vendor_sched/set_task_group_cam
@ -170,6 +178,16 @@ on init
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
# RT uclamp setting
write /proc/sys/kernel/sched_util_clamp_min_rt_default 0