Evolution-X-Tensor/device_google_gs101
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Revert "gs101:conf Add memlat CPU idle awareness settings"

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This reverts commit 2eb877f265.

Reason for revert: High perf UIBench regression

Change-Id: Ie3fcab4f9092c4ed3648d98871d007039f94647c
This commit is contained in:
Sophia Wang 2022-11-15 18:53:56 +00:00
parent b1c20fc847
commit 362e4bdebd
1 changed files with 0 additions and 18 deletions
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18
conf/init.gs101.rc
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@ -61,14 +61,6 @@ on init
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/pmu_limit_enable chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/pmu_limit_enable
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
chmod 0220 /proc/vendor_sched/set_task_group_bg chmod 0220 /proc/vendor_sched/set_task_group_bg
chmod 0220 /proc/vendor_sched/set_task_group_cam chmod 0220 /proc/vendor_sched/set_task_group_cam
@ -178,16 +170,6 @@ on init
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/up_rate_limit_us 500 write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/down_rate_limit_us 20000 write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
# RT uclamp setting # RT uclamp setting
write /proc/sys/kernel/sched_util_clamp_min_rt_default 0 write /proc/sys/kernel/sched_util_clamp_min_rt_default 0