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gs201:conf Add memlat CPU idle awareness settings

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Test: cat /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware

Bug: 256185411
Signed-off-by: Sophia Wang <yodagump@google.com>
Change-Id: I63c4a4816e5308d24b3274ed6a87180feeaa46f0
This commit is contained in:
Sophia Wang 2022-11-10 09:52:48 -08:00
parent 81096a3359
commit 0b1a579e9b
1 changed files with 18 additions and 0 deletions
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18
conf/init.gs201.rc
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@ -65,6 +65,14 @@ on init
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/pmu_limit_enable
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
chmod 0220 /proc/vendor_sched/set_task_group_bg
chmod 0220 /proc/vendor_sched/set_task_group_cam
@ -174,6 +182,16 @@ on init
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
# RT uclamp setting
write /proc/sys/kernel/sched_util_clamp_min_rt_default 0