Evolution-X-Tensor/device_google_gs201
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bcl: Adjust GPU clk divider ratio

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Revert GPU clk divider ratios.

Bug: 324534203
Test: Confirm no DATA_INVALID_FAULT while running GFXBench under stress
Change-Id: I84682b476af162eff904ed5bec66ae2e6fa6449a
Signed-off-by: George Lee <geolee@google.com>
This commit is contained in:
George Lee 2024-02-14 22:57:46 +00:00
parent ba206cfef1
commit 49a63dad63
1 changed files with 2 additions and 2 deletions
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4
conf/init.gs201.rc
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@ -897,9 +897,9 @@ on property:vendor.brownout.mitigation.ready=1
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0x80041c3 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0x80041c3 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c0 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c0 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c0 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c0 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0x80041c3 #DFS write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff041c1 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04381 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04385 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c1 #OCP write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c1 #OCP
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/uvlo1_lvl 3200 write /sys/devices/virtual/pmic/mitigation/triggered_lvl/uvlo1_lvl 3200
write /sys/devices/virtual/pmic/mitigation/triggered_lvl/smpl_lvl 3100 write /sys/devices/virtual/pmic/mitigation/triggered_lvl/smpl_lvl 3100