Evolution-X-Tensor/device_google_gs201
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Revert "gs201:conf Add memlat CPU idle awareness settings"

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This reverts commit 0b1a579e9b.

Reason for revert: High perf regression

Change-Id: I626b353bf4fd8f85e648112f45d6c818a67d193c
This commit is contained in:
Sophia Wang 2022-11-15 18:52:49 +00:00
parent 9c967743a2
commit 54eea43433
1 changed files with 0 additions and 18 deletions
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18
conf/init.gs201.rc
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@ -65,14 +65,6 @@ on init
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency
chown system system /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/pmu_limit_enable
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware
chown system system /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware
chmod 0220 /proc/vendor_sched/set_task_group_bg
chmod 0220 /proc/vendor_sched/set_task_group_cam
@ -182,16 +174,6 @@ on init
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/up_rate_limit_us 500
write /sys/devices/system/cpu/cpu6/cpufreq/sched_pixel/down_rate_limit_us 20000
# memlat cpuidle awareness setting
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu0_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu1_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu2_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu3_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu4_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu5_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu6_memlat@17000010/memlat_cpuidle_state_aware 2
write /sys/class/devfreq/gs_memlat_devfreq:devfreq_mif_cpu7_memlat@17000010/memlat_cpuidle_state_aware 2
# RT uclamp setting
write /proc/sys/kernel/sched_util_clamp_min_rt_default 0