Evolution-X-Tensor/device_google_gs201
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Snap for 8591706 from b0b360c6e8 to tm-qpr1-release

Browse source 
Change-Id: Id69090102be173fe885353b4dbd074eef316fbf2
This commit is contained in:
Android Build Coastguard Worker 2022-05-14 05:08:16 +00:00
commit 80013a1b61
2 changed files with 8 additions and 14 deletions
Download patch file Download diff file Expand all files Collapse all files

12
BoardConfig-common.mk
View file

@ -104,7 +104,6 @@ BOARD_EGL_CFG := device/google/gs201/conf/egl.cfg
USE_OPENGL_RENDERER := true
NUM_FRAMEBUFFER_SURFACE_BUFFERS := 3
BOARD_USES_EXYNOS5_COMMON_GRALLOC := true
BOARD_USES_EXYNOS_GRALLOC_VERSION := $(DEVICE_USES_EXYNOS_GRALLOC_VERSION)
BOARD_USES_ALIGN_RESTRICTION := false
BOARD_USES_GRALLOC_ION_SYNC := true
@ -112,8 +111,6 @@ BOARD_USES_GRALLOC_ION_SYNC := true
BOARD_USES_SWIFTSHADER := false
# Gralloc4
ifeq ($(BOARD_USES_EXYNOS_GRALLOC_VERSION),4)
ifeq ($(BOARD_USES_SWIFTSHADER),true)
$(call soong_config_set,arm_gralloc,gralloc_arm_no_external_afbc,true)
$(call soong_config_set,arm_gralloc,mali_gpu_support_afbc_basic,false)
@ -127,15 +124,8 @@ $(call soong_config_set,arm_gralloc,mali_gpu_support_afbc_wideblk,true)
$(call soong_config_set,arm_gralloc,gralloc_init_afbc,true)
$(call soong_config_set,arm_gralloc,dpu_support_1010102_afbc,true)
endif # ifeq ($(BOARD_USES_SWIFTSHADER),true)
$(call soong_config_set,arm_gralloc,gralloc_ion_sync_on_lock,$(BOARD_USES_GRALLOC_ION_SYNC))
endif # ifeq ($(BOARD_USES_EXYNOS_GRALLOC_VERSION),4)
# libVendorGraphicbuffer
ifeq ($(BOARD_USES_EXYNOS_GRALLOC_VERSION),4)
$(call soong_config_set,vendorgraphicbuffer,gralloc_version,four)
else
$(call soong_config_set,vendorgraphicbuffer,gralloc_version,three)
endif
$(call soong_config_set,arm_gralloc,gralloc_ion_sync_on_lock,$(BOARD_USES_GRALLOC_ION_SYNC))
# Graphics
#BOARD_USES_EXYNOS_DATASPACE_FEATURE := true

10
conf/init.gs201.rc
View file

@ -719,6 +719,10 @@ on property:sys.boot_completed=1
# Enable UFS powersaving
write /dev/sys/block/bootdevice/clkgate_enable 1
# Reset DDR frequency
write /sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/exynos_data/cancel_boot_freq 1
write /sys/devices/platform/17000020.devfreq_int/devfreq/17000020.devfreq_int/exynos_data/cancel_boot_freq 1
# Setup final cpuset
write /dev/cpuset/top-app/cpus 0-7
write /dev/cpuset/foreground/cpus 0-3,4-5
@ -749,11 +753,11 @@ on property:sys.boot_completed=1
# Set PMU freq limit parameters
write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/lcpi_threshold 2
write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/spc_threshold 59
write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/spc_threshold 70
write /sys/devices/system/cpu/cpufreq/policy0/sched_pixel/limit_frequency 1401000
write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/lcpi_threshold 6
write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold 64
write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/limit_frequency 1826000
write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold 65
write /sys/devices/system/cpu/cpufreq/policy4/sched_pixel/limit_frequency 1836000
write /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/lcpi_threshold 5
write /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/spc_threshold 69
write /sys/devices/system/cpu/cpufreq/policy6/sched_pixel/limit_frequency 2507000